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DAC38RF80EVM: LMK04828 SYSREF(P, N) outputs, Rev E schematic DAC38RF8xEVM

Atin Jain13
Prodigy 130 points
Part Number: DAC38RF80EVM
Other Parts Discussed in Thread: LMK04828

Hi

In the reference design for LMK04828 and DAC38RF8xEVM, sheet 5, the SYSREF (P, N) outputs are connected to the wrong pins on the device. SYSREFN is connected to SDCLKOUT3p and SYSREFP is connected to SDCLKOUT3n.

I wanted to evaluate the design with a FPGA board. I'm using Rev E schematic which I believe is the latest one. And since I couldn't find any question on this on the community, I assume that the the eval board functions as desired.

Can anyone kindly explain, how is it working even when it is connected in the wrong manner? And does TI know this and plans to correct the scehmatic?

Regards

Atin

  • 0
    TI__Guru* 91947 points

    Atin,

    This was done on purpose to make the routing easier on the EVM. This is not a problem since there is only one device in this link. The JESD204B standard is just looking for a rising edge on SYSREF. This would be a problem if there were several DAC devices involved and some of the DAC's had the signals routed correctly and others had the P/N swapped, as the rising edges would no longer line up properly.

    Regards,

    Jim