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ADS1293: ads1293 EVM failing the triangle waveform with DC -300mV

Part Number: ADS1293
Other Parts Discussed in Thread: ADS1291,

hi Team,

customer doing the waveform test on the ads1293 evm (previously they used and tested with ads1291

there is a test in the regulation with DC -300mV triangle wave input, but ads1293 output waveform doesn't meet the 10% distortion requirement.

ADS1293 EVM

input triangle wave 6.25HZ / Vpp=0.5mV / DC offset= -300mV  => FAIL. 

the requirement is pk-pk can not have 10% error or 50uV. output below with IN 1 = input signal, IN 2 = GND

ADS1291 EVM

input triangle wave 6.25HZ / Vpp=0.5mV / DC offset= -300mV  => Pass. 

output below with IN 1 = input signal, IN 2 = GND

Does the negative voltage signal input to the ADS1293, require more filtering? or it needs a negative voltage reference to the IC like the ads1291? (1293 is build in reference right?)

linearity and dynamic range requirement

  • Hi John,

    Thanks for posting your customer's question.

    The issue is likely because the ADS1293 is only using a unipolar supply and cannot accept negative voltages on the input pins. Remember that the -300 mV DC offset is a differential offset. The absolute voltage on both input pins must remain positive.

    For example, if the unipolar supply is 3.3 V, IN1 can have a DC of 1.65 V (mid-supply) and IN2 can have a DC voltage 1.95 V. IN1 - IN2 will be converted as - 300 mV. Use the function generator to create a 0.5 mVpp triangle wave with a 1.95 V DC offset as the input signal for IN2.

    Best regards,

  • so using ADS1293 as both IN1 and IN2 are positive voltage inputs and only the differential is negative. it should be able to meet the regulation ? if that's the case customer will try modify the test setup . Thanks
  • hi Ryan,

    customer checked with their regulation consultant. it appears that the input to IN1 and IN2 needs to be from 0V to -300mV. (can not be differential negative 1.65V to 1.95V)

    the consultant however mentioned that the ads1293 with external circuitry should be able to pass the test (not the EVM circuit) do you know the possible recommended circuit that can achieve this?

    another question, using  ads1293 to test regulation (201.12.4.4.102) input impedance, it needs to be >10Mohm. using 10Hz Sin wave , 5mV pk-pk to IN1. the output wave should not have more than 6% error.

    result 1: input sine wave 5mV 10Hz DC OFFSET = 0mV -> PASS

    result 2: IN1 add 620kohm, input sine wave 5mV 10Hz DC OFFSET = 0mV  -> FAIL

    it's tested that if the LEAD OFF ? bit is set. the result 2 output wave form will PASS. what might be the reason for the bit effect?

    customer is using ALL DEFAULT setting on the EVM for both -300mV and input impedance Test, 

    may we check that if they are only using IN1 and IN2, not using other channels, should they config other inputs to disable? needs to change other configurations?

    if not using other channels, can it be left floating ? or need to be pull high or low?

    Thanks for the help

  • Hello John,

    John Chou62 said:
    customer checked with their regulation consultant. it appears that the input to IN1 and IN2 needs to be from 0V to -300mV. (can not be differential negative 1.65V to 1.95V)

    I believe the consultant is incorrect. Please see this related post where the IEC test setup for Input Impedance is shown. The +/- 300 mV is introduced by connecting switch S4 to a DC voltage source. This adds a +/-300-mV offset to the signal after the 620k || 4.7nF impedance. The remaining electrode inputs are shorted to the RLD electrode at P3. This sets the common-mode voltage of the input signals to the same voltage, typically mid-supply.

    Regarding the input impedance results, it appears that the lead-off detection current causes the system to fail the test. Please see my response edited on 02/09/18 in this thread.

    Best regards,