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ADS1248: Self-Offset Calibration requires 1+ms delay after device configuration?

Part Number: ADS1248

Dear team,

Our customer uses 3x the ADS1248, sharing the SPI interface with separate DRDYn.

At startup the following sequence is executed:

  • Set start-pin high (pin23) of all ADCs
  • Wait 16ms. This is according to specification (page 75 figure 113)
  • Send command RESET, 0x06 to all ADCs
  • Wait for DRDYn of all ADCs and 0.5ms settling time
  • Send the commands: 0x40, 0x03, 0x01, 0x00, 0x30, 0x09  to all ADCs
  • Send the command: 0x16 to all ADCs (SDATAC)
  • Wait for data Ready of all ADCs
  • Wait for RDRYn of all ADCs
  • Send command SELFOCAL (0x62), to perform an offset calibration

 Result: failing self-offset calibration.

They can “solve” this by adding a "1-ms wait" after sending the SDATAC (0x16) - Line highlighted in Yellow

Could you please help us understand if something is wrong with the configuration?
The customer and end customer need to know why this 1 ms wait is solving the problem and if anything else could be messed up in the configuration.

Thanks and best regards
Martin

  • Hi Martin,

    Most likely the additional time required is due to reference settling.  In the register write sequence there is a setting change to power on and use the internal reference as well as to change to the data rate to 2ksps.  These actions will take place when the register write sequence completes.  As the reference is powered on there will a period of time where the reference will settle to the final value.  Depending on the cap load on the VREFOUT pin the settling time will vary.  Some information is given on page 33 of the ADS1248 datasheet.

    The times listed are approximate based solely on the cap value used, but there could be other factors such as trace length and other unaccounted for capacitance that may extend these times.  The reference should be fully settled before attempting to issue the self-offset calibration.  The 2ksps data rate corresponds to 500us (578us first conversion after register write).  If the self-offset command is issued during the reference settling, there could be differences in the expected result.

    It is also possible that there is some other issue, but as it is unclear as to what is meant by 'failing offset'.  Any additional information as to how failing offset is determined would be helpful.

    Best regards,

    Bob B

  • Hi Bob,

    Thank you for the clear /good explanation. I use a 22 uF on the Vref_out which explains the required additional time. I have overlooked the table in the specification. We will adapt the delay according to specification.

    Thanks again

    Marthijn