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ADS1204: Power sequencing and analog input design

KKF
Expert 4455 points
Part Number: ADS1204
Other Parts Discussed in Thread: OPA336

Hi,
I received some questions concerning ADS1204:

  • Are there any requirements for power-up & -down sequencing for AVDD (5V) and BVDD (3V3) for ADS1204? Or can they ramp up/down in either sequence?
  • Refering to DS page 19: Do both rails (5V AVDD and 3V3 BVDD) need to ramp before any signal is applied to CH x+/x- or is ok to have just AVDD ramped before having a signal at the analog inputs?
    Same question for CLKIN - is it ok to apply CLKIN when only BVDD is available or do both rail need to ramp up first? 
  • Refering to DS figure 26 (single ended sources): Shouldn't there be an RC-filter also at the output of OPA336 (ie inverting analog inputs of ADS1204) similar as for the non-inverting analog inputs?

Thanks & BR,
KF

  • 0
    TI__Guru**** 181001 points
    Hi Florian,

    • Start with page 2 of the ADS1204 datasheet where you see that AVdd and BVdd are specified WRT AGND and BGND - this tells you they can ramp in
    any order and are not related to each other with exception to the AGND and BGND levels. The ground difference levels cannot exceed +/- 300mV.
    • Also referring to page 2, note that the analog input voltages, the reference voltage and the digital inputs cannot exceed AVdd or BVdd by more than
    +/- 300mV. Analog inputs can follow AVdd, digital inputs can follow BVdd, and both can come up independent of each other.
    • Regarding Figure 26, I would use a resistor between the OPA336 and the 0.1uF cap depicted in that drawing. Refer to Figure 3 and the Capacitive
    Load section of the OPA336 datasheet for details.