ADS1298: Distort signal after 20hz

neuron stim

Part Number: ADS1298

hello everybody
I am trying to use ads1298 for make an eeg equepment
I set registers as below:
config1 => 0xE6   or 0b11100110
config2 => 0x22   or 0b00100010
config3 => 0xfd    or 0b11111101
chanels=> 0x60   or 0b01100000
LOF       =>0x03   or   0b00000011
RLD_SENSN&p=>0xff

now i connect INP and INN to function generator and see signals in matlab. when frequency go more than 20hz signal distort.
thank you

over 6 years ago

0 neuron stim over 6 years ago

Prodigy 100 points

my problem resolved
values of Vcap1,2,3,4 was wrong!
but I have another problem!:(
when I connect probes to a signal at a special frequency I see signalfrequency*1.465 in FFT.
when I put (sample Frequency)Fs = 314.23 Instead of Fs = 500 frequency corrected!

0 Ryan Andrews over 6 years ago in reply to neuron stim

TI__Guru 66296 points

Hello Neuron stim,

Thank you for your post!

Verify that the master clock input frequency is correct. If you are using the internal clock (CLKSEL = 1), the nominal clock frequency is 2.048 MHz. You can set the CLK_EN bit to 1 and probe the CLK pin to verify the signal is correct with an oscilloscope.

Regards,

0 neuron stim over 6 years ago in reply to Ryan Andrews

Prodigy 100 points

hello
thank you for your attention
I did it, but there is no signal on CLK pin.
I set Config1 = 0xe5 0b1110101

0 Ryan Andrews over 6 years ago in reply to neuron stim

TI__Guru 66296 points

Hello,

Please confirm that the CLKSEL pin is pulled up to DVDD in order to select the internal oscillator. Then, read back the register values from the device to verify they are written correctly. Remember that you must send the SDATAC command before any other commands in order to exit RDATAC mode.

You can also verify the output data rate is set by probing the /DRDY pin. The period between consecutive falling edges should correspond to the data rate period (1 kSPS when DR[2:0] = 101).

Regards,

0 neuron stim over 6 years ago in reply to Ryan Andrews

Prodigy 100 points

hello again
I did it, CLKSEL was 5V,
but /DRDY pin frequency was not regular.
also I readed registers values.
all of them are ok except CONFIG3 when I set it on 0xFD then read it return 0xFC

0 Ryan Andrews over 6 years ago in reply to neuron stim

TI__Guru 66296 points

Hello,

Is CLKSEL connected to AVDD or DVDD in your circuit? All digital pins must be referenced to the digital supplies and DVDD cannot be 5V. This violates the absolute maximum ratings on page 12 of the datasheet.

Bit 0 of the CONFIG3 register is read-only. You cannot set this bit using the WREG command.

Best regards,

0 neuron stim over 6 years ago in reply to Ryan Andrews

Prodigy 100 points

I saw this signal on /DRDY pin. please see blue signal on CH2.

thank you

~/cfs-file/__key/communityserver-discussions-components-files/73/CH2DRDY.wmv

0 Ryan Andrews over 6 years ago in reply to neuron stim

TI__Guru 66296 points

Hello - your video in the post above did not upload correctly.

Also, as I said before, CLKSEL should be tied to DVDD to select the internal oscillator. DVDD cannot be 5 V. Please capture an image/video of the CLK pin (when CLK_EN bit = 1) and the /DRDY pin.

Regards,

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ADS1298: Distort signal after 20hz