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ADC12D500RF: I/Q channel identical

Part Number: ADC12D500RF


A working design we have had since 2015 which has the ADC12D500RF and recording the I and Q channels are showing an odd behavior we have never seen.  The output of the ADC is identical of each channel, even though the inputs have been verified to be different.   Is there some mode that the ADC is in that is causing this, possibly a voltage on one of the pins?  I have the serial clock select held high since we are not using the serial communications.  The ADC is to had DDRPH to logic 1, both I/Q channels enabled (logic 0), non-demux mode enabled, and DES mode disabled.

Any ideas?

  • Hi Alexander
    When you say the "serial clock select" is held high, are you referring to the /SCS (Serial Chip Select) or /ECE (Extended Control Enable) pin?
    Can you confirm the actual voltage on both of these control pins?
    If the /ECE pin is properly held at logic high, the device is in Extended Control Mode and the SPI interface will be ignored. In this mode all functionality will be determined by other logic control pins.
    Can you also double-check that the voltage on the DES pin confirms a logic low state?
    Best regards,
    Jim B
  • Hi Alexander
    Do you have any updated information?
    Given the problem description it sounds like the ADC is somehow operating in DES mode, so both I and Q channels of the ADC are sampling the I or Q channel input. Changing the input signals should confirm which input is being sampled.
    If the input control pins are at the proper levels with /ECE pin high this should not be happening.
    If the /ECE pin is low then the configuration register values may not be at the proper default values.
    Best regards,
    Jim B
  • Hi Alexander
    Please let me know if you have any additional information to share.
    In the meantime I'm going to close this thread to take it off my active list.
    Best regards,
    Jim B