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ADS1262: ADS1262 resolution and dynamic range

Part Number: ADS1262
Other Parts Discussed in Thread: OPA388

Hello

I´m using the ADS1262 and I have a doubt about its resolution and dynamic range.
With a PGA set on Gain 32 and a reference voltage of 5V, the full scale range is 156mV. I ´m connecting to the ADS1262 a load cell of 100kg with 2 mV / V and it is excited with 5V. So the max. output of the load cell is 10mV.

The ADC and the load cell are connecting in ratiometric connection.

With this configuration does not take advantage of the capabilities of the ADC, due to  the most part of  the dynamic range does not be used.

I have some questions with respect to this:

- I would like to know how can I calculated the value of a 1 LSB and the quantification error for this configuration? 1LSB=FSR/2^n, but with this configuration, FSR is 156mV or it is continuing being 5V.

- With this configuration is only used 6.4% of the dynamic range (156mV=100%; 10mV=6.4%), is this mean that if for 156mV it is had 32 bits, for 10mV it is had only 2 bits (the 6.4% of 32bits)?

Apart of this questions...


Normally in this type of systems the correct way of increase the resolution is to adapt the range of the input signal to the range of the input ADC. To reach this it is neccesary for example use an instrumentation amplificator. I did this experimentally, but the read values were worse that without amplifier. Why the ADS1262 works better without a previous amplifier stage?

I read this post but I don't understand it good. http://e2e-ti-com.telligentsaas.net/support/data-converters/f/73/t/769753

Thanks in advance,

Best regards.

  • Hi,

    user5834775 said:
    - I would like to know how can I calculated the value of a 1 LSB and the quantification error for this configuration? 1LSB=FSR/2^n, but with this configuration, FSR is 156mV or it is continuing being 5V.

    To calculate the LSB size with respect to the PGA input (as opposed to the output), use 312 mV (since the ADC's FSR is +/- 156 mV). Therefore, for Vref=5V and PGA=32V/V, 1 LSB = 73 pV.
     

    user5834775 said:
    - With this configuration is only used 6.4% of the dynamic range (156mV=100%; 10mV=6.4%), is this mean that if for 156mV it is had 32 bits, for 10mV it is had only 2 bits (the 6.4% of 32bits)?

    Using 6.4% of the input full-scale means that your dynamic range is decreased by log2(6.4%) = -3.96 bits.

    However, the ADS1262 does not provide 32-bit dynamic range at 100% full-scale utilization. It will be closer to 20-26 bits depending on your data rate, filter type, chop mode, and PGA gain. See Table 2 in the datasheet for the dc ENOB (i.e. dynamic range) performance with different configurations.

    You are correct, typically by utilizing the full input range of the ADC you can get the maximum dynamic range performance. Usually this is done by adding a amplifier in front of the ADC...

    However, the problem with adding an external amplifier in front of the ADS1262 is that it already have has an integrated low noise PGA with a noise spectral density of about 7 nVrms/sqrt(Hz) and no 1/f noise! Most discrete amplifiers will have much higher noise than the integrated PGA and significant 1/f noise, which would get added to your input signal and degrade the system's overall resolution.

    The ADS1262 was designed such that you would be able to connect any small input signal source directly up to it and get the best performance without any additional signal conditioning required. Even though you'd traditionally want to further amplify your signal and maximize the input range of the ADC, that technique only improves the system's resolution if the amplifier has a lower noise than the ADC. I am only aware of one discrete amplifier which is able to come close to the dc accuracy and noise performance of the ADS1262's internal PGA, and that is the OPA388. However, since the noise performance is comparable and the OPA388 output impedance is slightly inductive (meaning it is not the best ADC driver amplifier), I would still recommend using the ADS1262 without any additional signal-conditioning circuitry.

  • Hello

    Thanks for the answer, it resolved me some doubts.

    I have other question and it have relation with the Full-scale differential input voltage range (ADC´s FSR). With a Vref =5V and a PGA=32V/V the FSR is +/- 156mV or 312mV. But if you apply a reference voltage of Vref(+)=5V and Vref(-)=0V and a PGA=32, the differential input voltage for the ADC is between 0-156mV because you supply the ADC with positive voltage. So... why in this case the FSR voltage continue being 312mV and no 156mV?

    Best regards.

  • Hi,

    The ADS1262 measures the differential voltage VINP - VINN, and then represents that measurement as an output code with 2's compliment format...

    Positive voltages between 0V and +FS (or +156 mV, in our example) will have output codes between 0x00000000 and 0x7FFFFFFF (or 0 and 2,147,483,647 in decimal). Negative voltages (i.e. VINN is more positive than VINP) between -1LSB and -FS (or -73 pV and -156 mV, in case of Vref = 5V and PGA=32V.V) will have output codes between 0xFFFFFFFF and 0x80000000 (or -1 and -2,147,483,648 in decimal).

    In summary, positive full-scale (+FS)  is +156 mV and represented by positive codes; however, the full-scale range (FSR) extends between +FS and -FS  (FSR = +FS - (-FS)) and is 316 mV.

  • Hello

    Thanks for the answer, it clarified me the concepts. I have asked to you one more thing that we can continue discuss in the other post. 

    https://e2e.ti.com/support/data-converters/f/73/p/800514/2962815#2962815

    Best regards