ADS42LB69: Pin definition for DDR/QDR LVDS interface

Yen Ting Chu

Part Number: ADS42LB69
Other Parts Discussed in Thread: ADS42LB49

Hi Team,

My customer has questions regarding to pin definition. In datasheet P.4 and P.6, we see different pin definition for DDR/QDR LVDS interface. However, TI only suggests 1 full P/N only. May i know which pin configuration should customer refer to when using ADS42LB69IRGCR.

Best regards,

Andy Chu

over 6 years ago

0 jim s over 6 years ago

TI__Guru* 91947 points

Andy,

I would have them use the pinout shown on page 4. If they plan on using QDR mode, they would just not have any connections on the NC pins, as described in page 6. This is how we did it on the ADS42LB69EVM schematic.

Regards,

Jim

0 Peter Chen(ICP_FAE) over 6 years ago in reply to jim s

TI__Intellectual 2480 points

Jim,

customer would like to know how to identify the ADS42LB49 difference? As the datasheet, the ADS42LB49 supports one PN but different Pin out definition.

0 jim s over 6 years ago in reply to Peter Chen(ICP_FAE)

TI__Guru* 91947 points

Peter,

The part can operate in two output data modes, DDR or QDR. If the customer plans on using DDR mode, they will use the pinout shown on page 5 of the data sheet. If they plan on using QDR mode, which uses fewer output data pins, they would use the pinout shown on page 6 of the data sheet. Not sure what is so confusing about this.

Regards,

Jim

Data converters

Data converters forum

ADS42LB69: Pin definition for DDR/QDR LVDS interface