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TPL0102-100: Zipper noise by Wiper Glitch

T Kishi
Genius 4425 points
Part Number: TPL0102-100


Hi

My customer has question.

Please cooperate me.

Customers want to use TPL0102 for audio volume adjustment.
TPL 0102 causes Wiper Glitch. Can this Glitch become a zipper noise?

Also, please let me know if there are any other concerns.

Best Regard

T Kishi

  • 0
    TI__Guru 55043 points
    Hi T Kishi,

    I will get back to you on Monday.

    Thanks,
    Paul
  • 0 in reply to Paul_Frost
    TI__Guru 55043 points

    Hi T Kishi,

    The phenomenon that are hearing is due to non-zero crossover volume change.  It can best be illustrated with a diagram.  Consider a sinewave (the music you are playing), but when you change the PDOT you are really just changing the amplitude of the sinewave.  If you have a sinewave of 1Vpeak, then reduce its amplitude to 0.75V, then to 0.5V at any random, you will see something like the following output.

    These sudden transients can be audible, and factors like glitch or switching delay might make them even more prominent. 

    In our early audio DACs, TI had similar issues when adjusting volume.  For this reason, our audio DACs are designed to switch the code only when the output is at nearly 0V (or at the center point).   This means that the amplitude changes when the output is already minimal.  Seem the image now where I moved the volume changes to the nearest 0V crossing:

    Now the changes take effect with minimal transients. 

    Now in regards to your circuit, I would recommend that you use the MCU in the system to coordinate the DPOT updates to implement a similar zero-crossing updates scheme.

    You could also consider a device like the PGA2311, which already has implemented this.  Our audio volume control ICs can be found here:

    http://www.ti.com/audio-ic/amplifiers/volume-control-ics/products.html

    Thanks,
    Paul

  • 0 in reply to Paul_Frost
    Genius 4425 points

    Paul

    Thank you for reply.

    I understood that it is necessary to reduce the influence of glitches on the Host MCU side in order to use TPL 0102 for volume control.
    One more confirmation, is there a possibility of digital feedthrough effect of SCL clock?
    In the waveform confirmed by the customer, a waveform indicating the possibility was confirmed.
    Is there a way to reduce this effect?

    TPL0102.pdf

    Regard

    T Kishi

  • 0 in reply to T Kishi
    TI__Guru 55043 points
    Hi T Kishi,

    You should verify that the layout isolates the digital components of the device. Usually the cause of the SCL/SDA signals is caused by the pull-up resistors on the bus. For example, if you have 2kΩ pullups on a 3.3V line, then you have 1.6mA switching on every edge. That can cause some supply or ground bounce depending on the routing.

    You could try increasing the pull-up values. www.ti.com/.../slva689.pdf

    Thanks,
    Paul
  • 0 in reply to Paul_Frost
    Genius 4425 points
    Hi paul

    The customer appears to be separating the GND.
    However, I have not confirmed the layout, so I will check it.
    Do you have a recommended layout for I2C, or a document that describes it?
    Also, if there is no problem with the layout, is there a way to prevent digital feed-through?

    Regard
    T Kishi
  • 0 in reply to T Kishi
    TI__Guru 55043 points
    Hi T Kishi,

    I do not know of a document describing I2C layout best practice. You could also consider a ferrite bead in series with the DPOT power supply, this could attenuate the digital cross talk as well. It is also important to verify if the cross talk is getting couple though the oscilloscope, rather than the board itself.

    Thanks,
    Paul