ADS62P22: Explanation of digital ramp and toggle pattern

Chris Fernandez

Part Number: ADS62P22

Hello TI,

Table 14 of the ADS62P22 datasheet describes various test patterns that can be applied to debug the output of the ADC. Most of these are straightforward to understand, but I am unsure of the specifics behind Toggle Pattern and Digital Ramp. Is there a document available to explain the expected output of these two test patterns in detail?

I would guess there is some type of output loop, but I would like to know specifically what the output is and when it updates.

Thanks,

-Chris

over 6 years ago

0 Vijayendra Varma Siddamsetty over 6 years ago

TI__Genius 10765 points

Hello Chris,

I have notified our ADS62P22 expert regarding your question. He will provide a more detailed response soon.

Best regards,
Vijay

0 jim s over 6 years ago

TI__Guru* 91947 points

Chris,

The toggle pattern will toggle all of the bits to 0 then 1 then 0 then 1 and so on. The digital ramp will start at 0 then increment the output by 1 count and repeat once it reaches full count.

Regards,

Jim

0 Chris Fernandez over 6 years ago in reply to jim s

Prodigy 100 points

Okay, so the expected hex output of the toggle pattern should be alternating between 0x000 and 0xFFF?

I'm observing switching between 0xAAA and 0x555, which does have every bit toggling, but with alternating patterns of every other bit being turned on.

0 jim s over 6 years ago in reply to Chris Fernandez

TI__Guru* 91947 points

Chris,

For the first one, yes. For the second one, you are correct. The data toggles between 0xAAA and 0x555. My mistake.

Regards,

Jim

0 Chris Fernandez over 6 years ago in reply to jim s

Prodigy 100 points

Just to clarify: are you saying there are two test patterns, one that outputs 0x000/0xFFF, and a second that outputs 0xAAA/0x555?

Or, is there just one toggle pattern, that only outputs 0xAAA/0x555?

0 Yusuf%20Agoro over 6 years ago in reply to Chris Fernandez

TI__Expert 4880 points

Hey Chris

To clarify, just one toggle pattern that outputs 0xAAA/0x555.

Yusuf

0 Chris Fernandez over 6 years ago in reply to Yusuf%20Agoro

Prodigy 100 points

Great, thank you for clarifying.

One last thing: when does the output switch between patterns? How does the output transition line up with respect to the sampling clock or CLKOUT signals?

I'm trying to use the multiplexed output mode, so the timing information is important to distinguish between the A and B channels on the rising/falling edges.

0 Yusuf%20Agoro over 6 years ago in reply to Chris Fernandez

TI__Expert 4880 points

Chris,

You can check by taking a capture after enabling the test pattern. View the capture in the time domain and calculate the frequency.

Thanks

Yusuf

0 jim s over 6 years ago in reply to Chris Fernandez

TI__Guru* 91947 points

Chris,

The output timing is the same for test patterns as for normal digital converted output. Please refer to the timing diagrams in the data sheet for details.

Regards,

Jim

Data converters

Data converters forum

ADS62P22: Explanation of digital ramp and toggle pattern