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DAC8775: DVDD applied after AVDD and PVDD_x

Roger Skarboe
Prodigy 40 points
Part Number: DAC8775
Other Parts Discussed in Thread: TIPD216,

Hello,

My design consist of DAC8775, setup in the same manor TIPD216 board (with use of internal buck boosts) with an input power of 24VDC. Internal DVDD is disabled, and 3.3V is connected to the DVDD pin on DAC8775. This again is connected to an processor via SPI. The prosessor has an requirement that no pins, e.g. the SPI pins, should be powered during start-up. So the initial design is to start up DVDD (3.3V power) after the 24VDC is supplied.

The datasheet of DAC8775 (Section 8.3.4 Analog Power Supply) states "It is recommended that DVDD is applied first to reduce output transients." How will these transients behave? Could these transients be harmful for connected load? Should I included an high side MOSFET to control the power sequence forcing DVDD (3.3V) first, then AVDD/PVDD (24VDC)? Or can this be ignored?

Thanks,

Roger

  • 0
    TI__Mastermind 46290 points

    Roger,

    The digital core which is powered by DVDD controls a number of features of the device, including the register map which carries a number of implications on the rest of the operation of the device. One of the features the register map controls is the impedance of the VOUT pin during power-up via the POC bit (bit 1) in the Reset Register (0x02). The POC bit is the main contributor concerning these transients as 30kOhms to GND provides a discharge path during power up when, in the analog domain, the input and output stages of the output amplifier are not powered up in a perfectly synchronous manner which may lead to the output stage temporarily weakly driving voltage into the load. The alternative is that the VOUT pin impedance is high-z which, without a load, will not be able to discharge these parasitics and cause a voltage transient on the output.

    In the end, this comment was provided in the datasheet to provide guidance for applications which are extremely sensitive to power-on transients. If you do not believe this to be a concern for your application, this comment can be ignored as there is not a functional requirement for the power supply sequence on this device. Generally speaking I would not anticipate the transients to be capable of damaging anything - typically we see these concerns come from customers who are maybe using the device to control a valve or other positioning element where any unexpected movement would be undesirable.

  • 0 in reply to Kevin Duke
    Prodigy 40 points

    Thanks Kevin,

    Most likely we'll use this board for control of valve or posistion elements in future applications, so it sounds like a good idea to provide a sequence in the power-up (by activating DVDD prior to AVDD/PVDD).

    Can you recommend a circuitry suitable for driving the 24VDC input to AVDD/PVDD by a 3.3VDC signal? I assume it's OK to use DVDD as control to power up 24VDC. We have limited space on the board, so small footprint is key. I assume TI has some suitable components for this.

  • 0 in reply to Roger Skarboe
    TI__Mastermind 46290 points

    Roger,

    I am not always the most up-to-date expert on what is going on in our adjacent power businesses, so it may be best to create a thread in their respective forums. I can however reach out internally and try to solicit a response for you here.

    One item we should discuss though is whether isolation is implied for this 3V to 24V boost converter or not. I'm not sure about the nature of your systems and whether isolation would be implied or not. The other thing worth considering is that if you plan on using the internal DC/DC converter of the DAC8775 the efficiency curve is actually dependent upon the input supply versus output current, and in most cases the efficiency is best at 12V PVDD/AVDD. So another thing for us to think about is whether a 12V supply would be acceptable in your system or not.

    Lastly, and actually a proxy to the previous isolation question, is that using the internal DVDD most of these issues are bypassed. So a final consideration for you would be if it would be a better solution to just have an isolated HV supply go to the DAC PVDD/AVDD and use the internal DVDD LDO.

  • 0 in reply to Kevin Duke
    TI__Mastermind 46290 points

    Roger,

    Do you have any reply to the comments I mentioned on the last post?

  • 0 in reply to Kevin Duke
    Prodigy 40 points

    Thanks Kevin,

    Due to space limitations we'll not use isolated power to PVDD/AVDD on the first prototype. I think we'll land on using the internal LDO (5V) on the DAC8775 (instead of a high side MOSFET to power PVDD/AVDD). The other side (SPI on processor) has 3.3V levels, but I see that DAC8775 should interpret these levels correct eventhough it's 3.3V. My plan then is to do a level translation on the two outputs SDO and #ALARM towards the processor.

    I assume that transients on the output should not be an issue then. If you have anymore comments please feel free to post :) Thanks for all your input so far!

  • 0 in reply to Roger Skarboe
    TI__Mastermind 46290 points

    Roger,

    I'm not sure I totally understand. The 5V LDO of the DAC is derived from PVDD/AVDD. What will provide power to PVDD/AVDD? Do you still want some suggestions on this, now knowing that the system will not include isolation and that the internal LDO will be used for the DVDD?

  • 0 in reply to Kevin Duke
    Prodigy 40 points

    Hi,

    We'll use a 24VDC power input for PVDD/AVDD (even though the efficiency is not at its best, and there is no isolation), and the internal LDO (5V) derived from PVDD/AVDD. Additionally, the plan is to do level shifting (5V to 3.3V) to match the signal levels of the processor's SPI interface. My assumption now is that the DAC8775 can interpret 3.3V signal levels, leaving only SDO and #ALARM needing level shifting to match 3.3V levels on the processor. My plan is to use a MOSFET (BSS138) to do the level shift, resulting in lower theoretically SPI clock speed than 25MHz.