• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 46 subscribers
  • Views 360 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

ADS1230: My function for read ads1230 Help me pls...

ADS1230: ADS1230

Ludek Pavlus1
Prodigy 20 points
Part Number: ADS1230

I have a question regarding to ADS1230. Question is following:

What logic level appears on DRDY/DOUT pin, when PDWN pin is set to L?

I would expect Hi-z, but diagram o datasheet page 19 shows Hi!

Thanks

Ludek Pavlus

  • 0
    TI__Mastermind 44640 points

     Hi Ludek,

    Welcome to the TI E2E Forums!

    The ADS1230 does not have a /CS pin to tri-state the nDRDY/DOUT as you might expect with most SPI devices. During power-down the nDRDY/DOUT will remain driven.

    However, I'm not 100% sure if the nDRDY/DOUT will be forced high when you put the device into power-down mode. It may be that nDRDY/DOUT will retain its previous state into power-down mode.

    Does that answer your question?

  • 0
    Prodigy 20 points

    OK, thanks for explanation.

    I just wanted to be sure, that it is/is not Hi-Z state. So I have to add Hi-Z buffer to be able to combine this signal with other SPI device....

    Best regards

    Ludek Pavlus