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ADS131A02: Clarification

Part Number: ADS131A02
Other Parts Discussed in Thread: ADS131A04

Hi, we are working with ADS131A02 with the configuration:

M0: GND througth 1k resistor.
M1: floating.
M2: GND througth 1k resistor.
8MHz crystal.

We have some questions:

WREG responses

1) Is 0x2F03 a correct response for ADC_ENA write with 0x0F? I received that response, but I expect the OR operation between:
0x2000 (RREG response)
0x0F00 (address for ADC_ENA register)
0x000F (valid value for ADC_ENA register, only 0x00 or 0xFF are valid)
result-> 0x2F0F, But we received 0x2F03.


2) There is the ADC_ENA the last register to write? Then we are not able to write all the registers with an only one WREGS command?

If 1) is correct, we have another question:

3) We have the SYS_CFG register with 0x7C (watch dog off, CRC mode 1, DNDLY 12ns, HIZDLY 12ns, FIXED off, CRC off). After the LOCK command we recibe: 0x05557FFF8000, then we interpret:
0x0555-> ADC is locked.
0x7FFF-> value for channel 1 conversion (positive full scale).
0x8000 -> value for channel 2 conversion (negative full scale).

Is this interpretation correct?


Thanks in advance
Martin

  • Martin,



    1. I believe this is the correct response for the ADS131A02. The ADC_ENA bits [3:0] originally were reserved for each of the four ADCs of the original ADS131A04. Bits 0 through 3 were representative of ADC 1 through 4 (again, for the ADS131A04). With the ADS131A02, there are only two ADCs. When enabled, these are bits 0 and 1 of the ADC_ENA. This would give you the 2F03h as the response.

    2. I would probably write the ADC_ENA as the last register. After power up, you would start by configuring the device, and then send the ADC_ENA to enable the ADCs. Then you could send the WAKEUP command to start conversion when ready.

    3. That is correct. The 0555h would be the response from the device to indicate that the device has interpreted the LOCK command. After that the 7FFF/8000 would be conversion data as indicated in Figure 72 of the datasheet.



    Joseph Wu

  • Joseph, thanks for the confirmation about the ADC_ENA response.
    Best regards
    Martin