Other Parts Discussed in Thread: DAC8871
Hello,
I have a customer trying to minimize the Major carry glitch of the DAC8871. Is there a way to do this? The operating voltage is +/-15V for VCC/VSS andVdd is +3.0V.
Ali,
As discussed on the phone earlier, I need some support from the TI AFE on the DAC8871 Major Carry glitch characteristics.
On page 13 of the datasheet it specifies typical glitches of ~450-500mV every time the DAC is updated.
Is there any way to minimize these glitches digitally? if so can you provide any suggestions on how to accomplish this?
The dac SCKL is running at 31.25MHz, but the DAC is only updated at a 244.14KHz rate (31.25MHz/128), The update frequency is a requirement and cannot change, however the SCKL frequency can change if it will help with the glitches.
Thanks,
Ali Kozak
Avnet FAE