DAC38RF89: SerDes PLL problem

Andrey Kondratev

Part Number: DAC38RF89

Hi!
I found an error in the PCB and now the PLL DAC is working.
But I had questions on SerDes PLL.
I apply to the DAC data with a frequency of 328 MHz, two IQ pairs. For data transmission, four SerDes lines are used, mode 44210. SerDes lane rate is 6560 MHz. SerDes PLL VCO frequency is 6560 * 0.25 = 1640.
I give the input DACCLK 328 MHz.
Set parameter values:
SERDES_REFCLK_PREDIV = 0,
SERDES_REFCLK_SEL = 0,
RATE = 0,
MPY = 0x28.
In the register DTEST, bits 11: 8 write 0x1. At the ALARM output, I see a frequency of 41 MHz (SerDes PLL VCO frequency is 41 * 80 = 3280), although I expected to see 20.5 MHz (1640/80 = 20.5 MHz).

What am I configuring wrong?

Configuration data read from the DAC:DAC38RF89_config.cfg

over 5 years ago

0 Ebenezer Dwobeng over 5 years ago

TI__Genius 9695 points

Hi Andrey,

I will test this and get back to you.

Thanks,

Eben.

0 Kang Hsia over 4 years ago

TI__Guru 67904 points

Hi Andrey,

It appears that you have programmed MPY = 10 instead of MPY = 5.

In your configuration, the 0x3C register (located in 0x43C in your script) is programmed as 0x9251

this is equivalent in binary b1001-0010-1001-0001

with the MPY register located in bit[8:1], you have b0010-1000, or 0x28.

For MPY of 5, you will need to program 0x43C as 0x9229, or b1001-0010-0010-1001. MPY = 0001-0100 or 0x14.

I believe there are some discrepancy in the datasheet table as it is different than the original table in the design document. I will communicate this to Eben upon his return from his holidays

The best way is to load your config file into the DAC38RF8x GUI and recheck your setting. I see MPY of 10 programmed. This yields 328MHz * 10 = 3280MHz reference for the SERDES

Data converters

Data converters forum

DAC38RF89: SerDes PLL problem