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ADS1278: ADS1278 : SPI Data Read

Part Number: ADS1278

Greetings,

I am using ADS1278 EVM with Dspic33 with these specifications:

  1. Fclk  = 27 MHZ (onboard)
  2. mode : Low speed
  3. Format: SPI - TDM - Dynamic
  4. Only 1 channel enabled rest is PWDN

the issue that i am reading by detecting the DRDY low signal then read the SPI data and the result is fine but when i slow the sampling time (in DSPIC software by using timer), noticed that the analog doesn't change instantly and i have to read a lot of data to reach the correct analog value

so how to solve this issue, i tried using PWDIN after reading but result is the same.

Also i am checking on DRDY without interrupt only in timer, is this correct ?

if (ADS1278_DRDY == 0)
{
  uint32_t temp;

  WriteSPI2(NOP);
  while(SPI2STATbits.SPIRBF == 0);
  temp = ReadSPI2();

  WriteSPI2(NOP);
  *data = (uint32_t)(temp << 16);
  while(SPI2STATbits.SPIRBF == 0); 
  temp = ReadSPI2();

  WriteSPI2(NOP);
  *data |= (uint32_t)(temp << 8);
  while(SPI2STATbits.SPIRBF == 0); 
  temp = ReadSPI2();

  *data |= (uint32_t)temp;

//here i disabled the channel using PWDIN

}

Thanks

  • Hello,

    Thank you for your question.  I am not certain I understand how you are using the ADS1278, so let me review how the part operates.

    The ADS1278 continuously converts.  In your configuration, Fclk=27MHz, CLKDIV=1, MODE=11 (Low Speed), the output data rate will be 10.547ksps.  The /DRDY pin will toggle at this output data rate whether you read data over the SPI or not.  The only way to further slow the internal conversion rate down is to lower the master clock frequency Fclk.

    If the master clock is fixed at 27MHz and you do not want to read data at 10.547ksps rate, your MCU can skip some of the conversion cycles.  You could, for example, only read every 3rd output conversion result from the ADS1278.  You would be limited to data rates of 1/2, 1/3, 1/4, etc. of the fixed 10.547ksps data rate in this case. 

    You would need to make sure your are synchronized to the /DRDY pin.  The best way to do this is to read the conversion result over SPI immediately after /DRDY goes low.  If you started a SPI transaction and before completion, the /DRDY pin went low, you would get corrupted readings, and you would need to wait another full conversion cycle before reading data again over SPI.  You mentioned use of an MCU timer; I suspect that you are out of sync with the /DRDY pin and you are getting corrupted readings.

    One other note, if the mode pins are changed, or the /SYNC pin or /PWDN pins are changed, then the ADS1278 will go through an internal reset.  In this case, it will take >129 output conversion reading cycles before the first data is available.

    Regards,

    Keith N.
    Precision ADC Applications

  • Thanks for the answer.

    I was using the debugger and read the analog data by a break point, but during the software halt i changed the analog input value of ads1278 then run the software, I noticed the value remain fixed and remain fixed for 100 or more reading then goes to the current voltage reading.

    i used the timer as sometimes the received data found corrupted, so i assumed that the DSPIC sample with rate higher than  10ksps (as pic runs with 8MHZ and the routine runs continuously in infinite loop), so i put the above reading routine in a timer interrupt to reduce the sample rate to be equal or less than 10ksps.

    1- is it normal to check on DRDY without interrupt ?

    2- I posted a snippet of the code i using to read the data, is it enough to sync with DRDY ?

    3- if you have example using SPI or pseudo code i would be appreciated

  • Hello,

    Yes, you can check /DRDY pin without an interrupt.  It is not uncommon to simply software pole this pin and then read the data result.

    Based upon your snippet of code, I cannot tell exactly what it is doing on the SPI IO lines.  If you can capture the /DRDY, SCLK, DOUT waveforms with a scope this may provide some clues.

    You said that it is taking over 100 conversion readings before it is updating.  This suggests that the device is getting reset.  Can you provide a schematic image?  It seems like the SYNC, PWDN, or the MODE pins are getting changed which is causing a reset and then the long settling time.

    I do not have any example code for the device, but if you can provide a scope capture for the IO lines, we should be able to figure out what is causing the reset.

    Regards,
    Keith