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DAC101C085:DAC101C085 data address

Part Number: DAC101C085
Other Parts Discussed in Thread: DAC101C081

Question 1: Does the A group address correspond to the setting of the DAC101C085? Does the group B address correspond to the setting of the DAC101C081?

Question 2: ADR0 of DAC101C081 has three configurations, as shown in box C. Among them, floating and GND are configured in the same way, and the corresponding addresses are the same. As shown in box D, the ADR0 configuration of DAC101C081 is only two effective? What is the significance of writing 3 here?

Question 3: The address configuration pin of DAC101C081 is only one ADR0, so only the three configurations shown in C are selected (the three configurations are all "-"). Why are there different addresses? As shown in the box D.

Question 4: This table lists the address bits of A6-A0, plus a 1-bit read/write flag to form the completion address. As an example, is it correct?

                                 Binary                   Hexadecimal

Address example:   1000110

Write address:        10001100                  0x8C

Read address:        10001101                  0x8D

  • Hi Jeffrey,

    There is typo/ambiguity in this datasheet.  The addresses that you have highlighted as Group A are valid for the DAC101C085.  The addresses you have highlighted as Group B are addresses that need to be avoided in the design by all devices that use the same I2C bus. This is due to an issue in the device where it will incorrectly ACK these addresses, but will not latch the data.  We are pursuing an update to the PDS to make this more clear.

    https://e2e.ti.com/support/data-converters/f/73/p/616487/2271141

    I think this should clarify questions 1, 2, & 3.  

    In regards to question 4: you are correct in the address formatting.

    Thanks,

    Paul