Other Parts Discussed in Thread: ADC08D500
Hi team,
When I read the ADC08D502 datasheet, it said it's a Dual 8-Bit, 500 MSPS A/D Converter. I noticed that it has 2 ADC cores inside the chip. So my question is what's the definition of the 500Msps? Which one is correct between a and b as below?
a. Each ADC core can do 500Msps, so 2 ADC cores can sample the same input at 1Gsps with interleaving.
b. Each ADC core can only do 250Msps, the 2 ADC cores can sample the same input at 500Msps with interleaving.
What's more, when I read ADI AD9288BST-100 datasheet, it said it's a Dual 8-Bit 100 MSPS ADC. So for this device, each ADC core can sample at 100Msps or 50Msps?
I am just a little confused about the sample rate claim in the datasheet between TI and ADI. So hope you could help on this. Thanks.
Best regards,
Wayne