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ADS1271: Radiated Tone in Modulator Mode

Part Number: ADS1271
Other Parts Discussed in Thread: ADS1205, ADS1274, ADS1201, ADS1281

Hello.  I am seeing some unexpected behavior when I use the ADS1271B and I could use some insight.

I am getting a radiated tone at 1/4096 of the modulator clock when I use the ADS1271B in modulator mode.  I can switch to frame sync mode and the tone will go away.  I have observed this behavior on the ADS1271EVM board as well as a custom board.  It is my thought that the ADS1271B is using less chip resources when it is being used in modulator mode so I am puzzled as to why it is generating a tone.  There are no tones on the input clock to the ADS1271B.  The tone is not present anywhere else on the board when I use the ADS1271B in frame sync mode.  I've used a spectrum analyzer and simply placed its probe on the ADS1271B body and the tone is quite visible.  The tone is not radiating from any test equipment.  Could someone lend some insight to this?  If the modulator is used in both the modulator and frame sync modes why am I only seeing a tone in modulator mode?

Thank you for your time.

  • Hello again.  I done some more testing and the 1/4096 tone is coming from the Mode (Pin 5) and Format (Pin 6) pins.  Per the datasheet, those pins can be left floating to enable modulator mode with an fclk/4 modulator clock.  But when they are left floating the 1/4096 master clk tone is present on those pins.  I want to remove the 1/4096 clock from these pins.  I tied Mode to 0.  This kept the modulator clock output at fclk/4 and the 1/4096 is no longer there.  Unfortunately, the Format pin is required to be floating to enable modulator mode.  Is there anything I can do to have the ADS1271B operate in modulator mode without the 1/4096 master clk present on the Format pin?

  • Hi Michael,

    A common approach to detect a floating input is to drive the pin internally with a low frequency oscillator.  Based on your measurements, I am fairly certain this is how the device determines the state of the pin.

    Also, it appears that the ADS1271 continuously monitors the state of the FORMAT and MODE pins and any change in the pin state will internally change the mode of operation.  If you want to operate in modulator output mode, I do not think there is a way to disable this oscillator on the output pin.

    Page 19 in the datasheet has a note that states the maximum load on the MODE and FORMAT pins of C<100pF and R>10Mohm.  I assume you do not have anything connected to this pin on the board, other than the ic pin pad.  You could try adding a small capacitor to slow the ramp rate down; I'm not sure if this will help much with the radiated noise that you see, but it should show some decrease.

    I'll discuss this with the designer to see if there is anything I am missing and provide an update to you by end of business tomorrow.

    Thank you.

    Regards,
    Keith Nicholas
    Precision ADC Applications

  • Keith,

    Thanks so much for the reply. 

    Thank you for the suggestion.  We added a 47pF cap on the FORMAT pin but unfortunately it did not change the 1/4096 signal shape enough to provide any significant decrease (>2dB) in the signal that is being radiated from that pin.

    Our application requires that the ADS1271B be use in modulator mode.  I am implementing the decimation filter in an FPGA.

    I appreciate you looking into this further.  I'm looking forward to any additional information you might get from the designer.  I do have a couple of questions if you have a minute:

    1)  Is it possible for the low frequency clock to be set to a different divide down value?  It always seems to be 1/4096 of the master clk. 

    2)  If the 1/4096 signal on the FORMAT pin is unable to be changed or disabled do you have another product that could provide the same type of 6th order chopper-stabilized modulator that the ADS1271B provides.  I see the ADS1201 and ADS1205 modulators but they are not comparable.  The ADS1274 has the same modulator but it is far too large.  Do you have any suggestions?

    Mike

  • Hi Mike,

    1) There are no options to adjust any of the internal clocks other than adjusting the master clock frequency CLK.

    2) The ADS1281 has a filter by-pass option.

    I'll provide an update later today regarding any other possible options to work around the floating inputs.

    Regards,
    Keith

  • Hey Keith,

    Thanks again for the response.  I really appreciate you getting back to me so quickly. 

    I took a look at the ADS1281.  I like the fact that the modulator mode doesn't rely on the detect circuit present in the ADS1271, but it's only a 4th order modulator and the package size is a bit large for our form factor.

    We're continuing to work this issue on our end as well.  I have a couple additional questions for you if you don't mind:

    1)  We've observed that we can overdrive the FORMAT pin clock with a second clock.  We can overdrive it by +/-700Hz of 1/4096 and it will still stay in modulator mode.  The modulator appears to work normally in this state.  Do you know of any reason that we should not overdrive the FORMAT pin clock?

    2)  We were slated to purchase 20000+ of these ADS1271B components in the near future to support our projects.  Does TI have the ability to create a custom component with the ADS1271B functionality which would not place the 1/4096 clk on the FORMAT pin?

    Thanks,

    Mike

  • Hi Mike,

    I spoke to the designer regarding the Hi-z detect circuit. The design requires the oscillator waveform to be synchronized with the internal divided clock. There is some room for error, but this has never been analyzed. Using an external oscillator could eventually result in the device temporarily changing from modulator mode to either SPI or Frame Sync and then back to modulator output.

    The internal logic for the hi-z detect function is hard coded and would require a change to the die. There are no special configuration modes that could be used to change the behavior of this function. A custom device is not a feasible option.

    I did have a few questions.

    1. Is the magnitude of the noise causing problems in your system, or is it the specific frequency? You can shift the frequency by changing the master clock frequency since the oscillator is a divided version of the master clock input, CLK.
    1. Is this a board layout issue? Do you have anything connected to the physical pin other than the board pad? Are there any sensitive board traces routed near these pins? You could try cutting the pin off of the device to further reduce any coupling or radiation into the board.

    Regards,
    Keith

  • Hi Keith,

    Thanks again for the response. 

    I am disappointed that there are no special configuration modes that could be used to change the behavior of the FORMAT pin function. 

    Answers to your questions:

    1)  Yes, the magnitude of the noise is causing an issue in our system.  We can shift the frequency by changing the master clock, but the modulator maximum frequency of the ADS1271B master clk does not allow us to shift the tone the ADS1271B is generating on the FORMAT pin in modulator mode to a point where it is not showing up in our system.  The 1/4096 master clk divide down is too large of a ratio to overcome.

    2)   No, this is not a board layout issue.  This issue is directly related to the radiated tone coming from the FORMAT pin.  We've done several things to determine if the radiated noise from the FORMAT pin can be mitigated.  We've cut the trace to the pull up we have on the FORMAT pin to change from frame-sync to modulator mode, we've placed Kapton tape on the pad to just have the radiated noise come from the FORMAT pin, and we've removed the FORMAT pin completely and covered the nub with foil to mitigate the noise radiating from the pin.  The first two attempts did not result in much EMI improvement.  The final attempt did result in a significant improvement but it required removal of the entire pin.  We are going to cover the component body in foil tomorrow to try to further suppress the radiated noise.

    I really appreciate your help.  We are going to try a few more things to try to mitigate the noise coming from the FORMAT pin tomorrow.

    Thanks,

    Mike

  • Keith,

    We're continuing to try different things on our end.  Removing the FORMAT pin and covering the exposed nub and component body in grounded foil is producing improved results.  But the modifications take a good deal of time and effort.  A couple of additional questions:

    1)  The datasheet indicates that the DIN pin should be tied to DVDD when operating in modulator mode.  I have been doing that.  Today, I set it to GND and it did not seem to make a difference.  What function does the DIN pin serve in modulator mode? 

    2)  Do you have any further suggestions or things to try? Any follow up to my responses from last night? 

    3)  Could you provide me with information for a sales contact?

    Thanks,

    Mike 

  • Hi Mike,

    To my knowledge, radiated noise from the MODE and FORMAT pins has never come up as an issue in the past.  There were customer problems early on with too much board capacitance, which is why we updated the data sheet to require C<100pF and R>10Mohm of load on this pin when set to hi-z. 

    I have not been able to dig any information up that has the details explaining the requirement for DIN=DVDD in modulator mode.  If we do find something, I will pass it along.

    I have been discussing this with my colleagues, and at this point, the only other suggestion was to use a shield, which you are already looking at.

    I will reach out to the Field Sales team.  Is it O.K. for them to contact you at the email address you used to register for your my.TI account?

    Regards,
    Keith

  • Keith,

    Thanks.  I am continuing to look into anything that might help remedy the situation with the radiated noise coming from the ADS1271.  If you do find out why the datasheet requires that the DIN pin be tied to DVDD please let me know.

    Yes, please feel free to send the sales information to the email address in my TI account.

    Mike

  • Keith,

    I have two questions.  If you could possibly get back to me today it would be greatly appreciated.

    1)  I still have not heard from a TI sales representative.  Could you provide that information or instruct them to contact me by email as soon as possible?

    2)  Does the ADS1271 (non B-grade part) have the 1/4096 master clock present as part of its design but just not brought out to the FORMAT pin?

    Mike

  • Hi Mike,

    1)  I believe you spoke with the local TI Sales contact today.

    2)  The non B-grade ADS1271 uses the same circuitry as the ADS1271B.  If you float this pin, you will see the 1/4096 master clock.

    I do not recall if you mentioned the supply voltage used on the DVDD pin.  If you are using 3.3V, you could reduce this supply to 1.8V which should reduce the emissions seen on the floating pins.  Of course, this would require your processor to accept 1.8V logic levels as well to support.

    Regards,
    Keith

  • Hi Keith,

    Thanks for getting back to me so quickly.

    I did not speak with a sales contact today, but of my colleagues did set up a meeting for tomorrow with TI.  I'm not sure what means he used to contact TI. 

    It is good to know about the non-B grade.  That is helpful information.

    We are currently using 1.8V on DVDD. 

    Mike

  • Hi Mike,

    I am going to close out this E2E thread.  Please contact me directly if you have further questions.

    Regards,
    Keith