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AFE5803: cap size

ajayt
Genius 9555 points

Part Number: AFE5803

I have a couple of queries re. the AFE5803 that I’d appreciate guidance on.

 

  1. Are capacitance values 100nF (to INxP) and 15nF (to INxM) enough for low frequency (700kHz) operation?
  2. Does the hardware reset pin when active set digital output pin impedances high?

 

  • 0
    TI__Expert 6040 points

    The cap vs freq relationship is in the datsheet.  there are settings for 100Khz~200KHz @15nF. if their operaiton freq is 700Khz, 15nF is OK.  100nF at INP is also sufficent for 700Khz signals. 

    CBYPASS (≥0.015 µF) is used to set the high-pass filter cut-off frequency and decouple the complimentary input. Its cut-off frequency is inversely proportional to the CBYPASS value, The HPF cut-off frequency can be adjusted through the register 59[3:2] a Table 9 lists.

    the hardware reset pin won't put digital LVDS output into high impedance. after reset or power up, the LVDS outputs are live and sending out data. 

    Thanks! 

  • 0 in reply to Xiaochen (Sean)Xu
    TI__Genius 9555 points

    HI Many thanks :-

    I did have a further think about the AFE power on scenario. If the AFEs were powered with the GLOBAL_PDN line pulled high (tracking the 3V3 rail), I would expect the LVDS to be in tristate as the AFE data sheet states 0.7mW per channel is consumed in power down mode with AFE references turned off ……  LVDS needs reference levels and >0.7mW to be functional. However, this line of thought maybe wrong. Could you confirm if LVDS outputs are disabled in the event of GLOBAL_PDN in high state during power on.

     

  • 0 in reply to ajayt
    TI__Expert 6040 points

    Hi, 

    you are right. if the gloabla_PDN is active, the LVDS output will be disabled, plus all internal LVDS CLK generators.  Thus it acheives low power, but the power up time will be longer as stated in the datasheet. 

    Thanks!