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ADS1298 SPI questions

Other Parts Discussed in Thread: ADS1298

 

Hi all

 

We are buit a board to use your ADS1298 for a medical/research project. In particular now we are writing the code to interface your ADS with ADSP2183 from Analog Devices.

I'm new about the "firmware programming" and I have some questions regarding the SPI port. In the image you can find the part of schematics relative to Texas chip and you can note the we want to use less configuration pin as possible (we want to use the register approach)

 

1) As you can see form the schematic, actually we don't connect the DRDY pin and we want to avoid it unless is real necessary. About that, in the datasheet (pg 29) is written that in continuous mode the Dout can indicate when new data are ready (so can be used instead of DRDY pin). That means that with CS low the Dout is normally at 0 and I have to search for 1100 (initial bit of status register) pattern from status register to trigger the data start or the aprroach is another?


2) From the datasheet seams that ADS1298 make always a stream of 8 channel + the status register and so there is no way to has only one channel (i.e. I want only channel 4 output). Can you confirm that?

3) At pg 42 of datasheet is described the bit 6 of CONFIG1 register. We use a single device and for now we want to avoid the multiple readback. So the default value (0) is correct for our purpose?

4) I have a doubt about the DRDY. At pg 29 (and in the figure 33 and 34) the DRDY goes low when the data is ready, but after that goes high at next SCLK cycle while at pg 31 (fig 35) goes low when data are ready but remain low for Tdr and then has a sort of "glich" for 4*Tclk (is the same for continuous mode at figure 37). So what is the behaviour of DRDY pin is goes low only for a Tsclk cycle or remain low for all Tdr?

5) From the datasheet (pg 37 table 11 and pg 40) seems that we have always to use 2 byte of opcode also if we want to read/write a single register while for the other opcode is necessary only one byte. Could you confirm that?

Thanks,

Luca

 

  • Hi Luca,

    You don't have to use DRDY, but having it drive an interrupt service routine can make life a little easier sometimes.  Polling the status byte can eat up bandwidth in the processor.  If you find yourself running out of MIPS, you might want to consider using DRDY as an interrupt source.

    You only need to read data based on the number of channels enabled.  For example, if you only have channel four active, you only need to read the status bytes and 3 bytes of data.  Clearing bit 6 of Config1 (the default) is fine.

    DRDY goes active low when data is ready.  The signal stays low until a) you read the data - at which point DRDY returns high (figures 33 and 34) or b) until the next data set is ready, at which point the DRDY pulses high (assuming you don't actually read the data).

    Yes - reading and writing registers require two byte opcodes.

  • Hi Tom,

     

    Thanks for your answers.

     

    Kind regards,

    Luca