ADS122C04: About START/SYNC and POWRDOWN command

Hi Kanemaru,

See my responses below.

Best regards,

Bob B

hideto kanemaru said:

Part Number: ADS122C04

Hi Team,

 

We would like to decrease “Peak supply current of application”.

Therefore, we would like to operate ADS122C04 by START/SYNC and POWRDOWN command.

Please refer to the following Questions and Figure.

 

[Q1]

We understand that If Data rate is 20SPS at CONTINUOUS CONVERSION MODE,

Time A in Figure is around 28us (28.5*tCLK(Normal mode)).

Is my understanding correct? [Bob B] That would be correct excluding the IDACs.  If you are using the IDACs, they are powered down in POWERDOWN mode requiring additional time for power up.  You may also need additional time for system analog settling.

 

[Q2]

Could you please let us know TimeB in Figure(??us)? [Bob B] The timing is dependent on when the command is issued.  So the 'B' period can be from 0us up to the time to complete a full-conversion (which would depend on the data rate). At 20sps this time could be up to 49.99ms.  The concept to minimize the time to enter POWERDOWN would be to issue the command during the last conversion desired, and by making sure the command is completely sent before the conversion ends.  See the Operating Flow Chart in Figure 54 on page 32 of the datasheet and in particular the note (3) under the figure.  The POWERDOWN command allows any ongoing conversion to complete before placing the device in power-down mode.

 

[Q3]

Could you please let us know if you have any concern for my timing chart? [Bob B] There could be some variation relative to the internal oscillator timing.  As shown in the Electrical Characteristics table on page 6, the Internal Oscillator can typically vary by +/- 1% and as much as +/- 2%.  Another consideration is analog settling time.  If you completely power down the analog circuitry, there will be some time for components excited by the IDACs to reach nominal values.

 

 

 

Regards,

Kanemaru

Hi Bob B-san,

Thank you for kind support.

I have three additional questions for [Q1] & [Q3].

----------------

[Q1’]

I don’t use IDAC function.

So, I understand that Time A is 28us + system analog setting time.

And, I understand that system analog setting time is ADS122C04 spec.

Is my understanding correct?

If yes, could you please let us know about system analog setting time (my guess is few us)?

*This value does not need to be a guarantee.

----------------

[Q3’]

Could you please let us know about analog settling time (my guess is few us)?

*This value does not need to be a guarantee.

----------------

Regards,

Kanemaru

Hi Kanemaru,

Based on the other questions regarding the ADS122C04 that included discussion about IDAC and analog supply current I apparently made a bad assumption that this question would also include use of the IDACs.  If IDACs were to be used and as the primary purpose for the IDACs is to provide excitation current for a sensor, then there would be settling time of the charge/discharge of caps on the current path.  I was referring to the IDAC current path analog settling and not the ADS122C04.

See my additional responses below.

Best regards,

Bob B

hideto kanemaru said:

Hi Bob B-san,

 

Thank you for kind support.

I have three additional questions for [Q1] & [Q3].

 

----------------

[Q1’]

I don’t use IDAC function.

So, I understand that Time A is 28us + system analog setting time.

 

And, I understand that system analog setting time is ADS122C04 spec.

Is my understanding correct? [Bob B] Time A is actually 28.5 * tClk and tClk is 1/1.024MHz.  The result is approximately 27.8us, but can vary by as much as 2% and could be 28.4us.  If the input is static (no change in the input path due to POWERDOWN) then there would not be any additional analog system settling delay.

 

If yes, could you please let us know about system analog setting time (my guess is few us)?

*This value does not need to be a guarantee.

----------------

 

[Q3’]

Could you please let us know about analog settling time (my guess is few us)? [Bob B] The analog settling delay I was referring to is the delay time required to settle the analog input path if sensors are excited from the ADS122C04.  This is not referring to the ADS122C04, but rather circuitry (R and C) of the current path for the sensor.  Primarily this would be the analog input filter designed for the system.

*This value does not need to be a guarantee.

----------------

 

Regards,

Kanemaru

Hi Bob B-san,

I understood your explanation and sequence(TimeA & TimeB).

Regards,

Kanemaru