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TVP5150AM1 Output format and use

Other Parts Discussed in Thread: TVP5150AM1, TVP5150

 

1) Please read this post from the bottom up (starts at bottom and most recent at top

2) Customer is trying to understand output of TVP5150AM1.   Please read below and clarify.

 

CUSTOMER FOLLOW-UP TO MY RESPONSE TO ORIGINAL QUESTION >>>>>>>>>>>>>>>>>>>>>>>>>>>>>

As best as I can tell when the TVP5150AM1PBS is in YCbCr 4:2:2 mode:

1)      The YOUT data will be driven out synchronous with the PCLK signal at 27 MHz (or thereabouts based on the incoming video).

2)      At each rising edge of PCLK a complete pixel will be described with 4 bits of luminance, 2 bits of Cb chrominance, and 2 bits of Cr chrominance.

3)      The FID output indicates which frame (odd or even) is currently being output

4)      The VBLK output is high when the YOUT data is not video data (closed captions, etc).  The VBLK output goes low to indicate that YOUT is providing pixel data for the visible part of the frame.

 I’m working on the assumption that I can use the PCLK, FID, and VBLK signals to capture the YOUT data using an inexpensive FPGA.  Each YOUT data byte would be written to memory and would represent one pixel of the image.  YCbCr to RGB conversion and de-interlacing would be required and would probably be done in the Stellaris microcontroller as the image was being sent over an Ethernet connection.  (The actual application is for the receiving machine to perform real-time image analysis on individual frames.)

 I’m new to working with video so I may be completely wrong with how the chip (and digital video in general) works.  Of course I’ll connect the VSYNC and HSYNC outputs of the TVP5150AM1PBS to unused inputs on the FPGA in case I need them but from what I can see I probably won’t need them.

Most of the information I’m seeing connects the digital output of a converter like the TVP5150AM1PBS to another chip that is expecting BT.601 or BT.656 data streams so all the documentation is a little light on describing the specifics of the digital data stream.  For example the TVP5150AM1PBS 4:2:2 timing diagram (Figure 3-5) doesn’t even show HSYNC.

 As this is a home project I won’t be able to purchase the eval kit but if I’m right about the digital output of the TVP5150AM1PBS then I shouldn’t need the eval board.

 I guess the best way to describe this piece of the overall project would be “low cost NTSC to IP converter” but the actual project is “vision system for autonomous robot”.

 I’m looking at using the Stellaris right now but the LM3S9B95 only supports 16 bit data transfers to external devices if the address and control signals are used.

MY RESPONSE TO ORIGINAL QUESTION >>>>>>>>>>>>>>>>>>>>>>>>

I see an eval kit for the TVP5150 ...

 

 

Also, note the TVP5150 is not recommended for new designs; consider the TVP5150AM1

 

 

It appears that the output formatter providess a YCbCr output ...

There appear to be a variety of output choices ..

  • Hello Ajp,

    I assume you are using the discrete sync output, not embedded sync.  Have you configure the register 03h and 0Fh to output FID and VBLK?  Could you let us know if you are using patch or ROM?  Can you send us your 03h, 0Fh, ROM major and minor registers value?

    Regards,

    Viet

  • My customer responded with the following ....

    I don’t have the board designed yet.  I’m trying to determine how to use the part before I build the board.  If I had the board already built I could probably figure the interface out through “trial and error”.  I was hoping to use the datasheets and FAQs to design the board instead of “trial and error”.

     

    To answer the questions that I can answer without having actual hardware:

     

    Yes, I intend to use discrete sync output in YCbCr 4:2:2 mode.

     

    I have no information about patch or ROM mode.

    What do you think?