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DAC3482: The wave-shape of broad bandwidth signal in frequency domain

Part Number: DAC3482
Other Parts Discussed in Thread: TRF370417

Hi TI experts,

I am trying to generate a single tone signal and make the signal tone signal sweep 80MHz in freq domain. And this sweeping baseband signal is sent to DAC3482.

DATACLK = 245.76MHz which comes from FPGA which is synced with data.

DACCLK = 983.04MHz which comes from TI frequency synthesizer LMK04803.

The baseband signal is sent to DAC, use DAC internal mixer to move baseband signal to 245.76MHz.

The signal sweeps from 205.76MHz to 285.75MHz.

DAC3482 has two pairs of differential ports. These two-pair ports have IQ relationship.

These two pairs signals are sent to TI quadrature modulator TRF370417. A LO carrier is sent to modulator to move sweeping signal to, for example, 5.8GHz.

Quadrature modulator TRF370417 is unable to programme.

If I use signal-ended semi-rigid cable to test one of output ports of DAC3482. The 245.76M freq domain signal shape is like below picture:

The flatness of the envelop is about 5dB.

The basic DAC registers are configured below:

1. Choose 8 interpolation.(I feel this should be 4, but when I set 4, the spurious rised.)

2. Shut-down FIFO. There is no sync and ostr signals providing to DAC.

3. Shut down invsinc filter.

4. 16-bit input mode(word wide).

5. MIXER_ENA and MIXER_GAIN are opened.

6. Choose CMIX and shut down NCO. CMIX mode choose Fs/4, means 983.04/4=245.76MHz.

7. Choose external reference CLK.

8. Shut down PLL.

9. Set current 20mA.

The problem is the sweeping shape in freq domain which test in 5.8GHz is like waves and sinc below (test in output port of modulator TRF370417):

But if I turn on invsinc filter, the envelop of modulator output is like below:

A very strange phenomenon is if I write reg0 bit0 "1", the output of modulator can become flat in freq domain.

But the reg0 bit0 is reserved, that means nothing. The relatively flat picture is attached below:

My questions are:

1. What makes output envelop in freq domain like waves and how can I optimize it?

2. Do I have to turn on FIFO in this case?

Thank you and best regards.

Bo

  • Hi Bo,

    A few basic fundamentals on the general DAC3482 setup:

    1.

    Bo Li said:
    Choose 8 interpolation.(I feel this should be 4, but when I set 4, the spurious rised.)

    you have to study the LVDS bus input timing relationship on the datasheet. With 16-bit LVDS bus DDR, the I channel is latched on the rising edge, and Q channel is latched on the falling edge. With 245.76MHz of DDR clock, the I/Q sample rate is coming in at 245.76MSPS. This calls for 4x interpolation setting (245.76MSPS*4 = 983.04MSPS)

    2. FIFO turning on is recommended due to the potential skew change over temperature, voltage, and process. See below link for configuration guide.

    http://www.ti.com/lit/an/slaa584/slaa584.pdf

    3.

    Bo Li said:
    3. Shut down invsinc filter.
    . For situation like these with higher output frequency compared to sample rate, we recommend enable inverse sinc. You will need to back-off your data accordingly.

    4.

    Bo Li said:
    MIXER_ENA and MIXER_GAIN are opened.
    . Please back off your data as your data may become saturated.

    I recommend that you use our TSW3084 or TSW3085 EVM to perform such evaluation on the RF output. Please also use our TSW1400 and DAC3482 EVM to get a good initial DAC3482 setup going before going to the TRF370417 output. You must have good understanding of the DAC3482 setup before you can get good output on the TRF370417.

    Also, most of the gain flatness is impacted by the matching between DAC3482 and TRF370417. Please refer to the interface guide between the DAC and TRF for detail:

    Good luck. By the way, the DAC3482 EVM GUI has some basic setup files that you can refer to get your system running.

    -Kang

  • Thanks Kang.  I will try what you susgested!