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ADS1605: Δ-Σ ADC problem

Part Number: ADS1605

Hi team,

Customer found that the Δ-Σ ADC had the highest sampling frequency of 5M and its bandwidth (BW) was 2.45M (ADS1605). For isolated Δ-Σ ADC, the sampling frequency can be as high as 20MSPS, but the bandwidth is only 800K. (AMC1304x-Q1)

Customer has the following questions. Could you give some suggestions?

Why can the sampling frequency of isolated ADC be so significantly increased? But the bandwidth is reduced?

Why are isolated ADCs based on Δ-Σ modulator and there are no isolated ADCs in other architectures such as SAR?

Best Regards,
Amy Luo

  • Hi Amy,

    You need to study the datasheets of the ADS1605 versus the AMC1304 to get a better understanding of what is going on with these devices.  The ADS1604 is a complete ADC, providing fully settled data at 5MSPS (10MSPS in 2X mode).  The AMC1304 is just a modulator - all you get out of it is a digital bit-stream that still needs to be passed through a digital filter, you are not getting fully settled data at 20MSPS.  That is why the bandwidth of the AMC1304 is so much smaller.  A SAR type converter would need to be treated differently - SAR converters take one sample, digitize that, and then provide a conversion result.  This can be done by isolating the serial interface (CS, SCLK, SDO, and SDI if its 4-wires).

    If the differences are not clear to you, feel free to send me a note.