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DAC088S085: fSCLK and 1/fSCLK

Yuto Sakai
Mastermind 6100 points

Part Number: DAC088S085

Hi,

Could you tell me about the spec of fSCLK and 1/fSCLK in the data sheet P.8 “AC and Timing Requirements”?

Is fSCLK NOM and MAX correct? (NOM: 30MHz, MAX40MHz?)
Also, is 1 / fSCLK MIN and NOM correct? (MIN: 25ns, NOM: 33ns?)


If the data sheet is correct, please tell us how you think about it.

Best regards,
Yuto Sakai

  • 0
    TI__Genius 14220 points

    Hi Yuto,

    Thank you for your query. It's actually duplicate information. The 25ns typical clock period corresponds to typical 40MHz SCLK frequency and the 33ns minimum clock period corresponds to max 30MHz SCLK frequency.

    It's surely duplicate information. But I don't see any contradiction. 

    Hope that answers your question.

    Regards,

    Uttam Sahu

    Applications Engineer, Precision DAC

  • 0 in reply to Uttam Sahu
    Mastermind 6100 points

    Hi Uttam-san,

    Thank you for your reply.
    Is the description of Spec correct?
    I think fSCLK Max is 40MHz and NOM is 30MHz.
    If you are wrong, please tell me how to think of this spec.

    Best regards,
    Yuto Sakai

  • 0 in reply to Yuto Sakai
    TI__Genius 14220 points

    Hi Yuto-san,

    Looks like there is a typo. I just checked the 12-bit variant of this part and the description is as follows. It makes sense.

    Hope that answers your question.

    Regards,

    Uttam