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LM98620: lm98620 Test with fixed analog input

sheree subahan
Prodigy 250 points
Part Number: LM98620
Other Parts Discussed in Thread: OS3, OS4

Hi,

  I planned to test the LM98620 by applying the fixed Analog voltage using Trim Pot.

(1) What is the maximum input voltage can be feed at analog input pin?

(2) shall we use OS1 has -- analog input & OS2 tied to ground?

(3) what are configuration setting to be do for the above test?

(4) How to calculate Input voltage Vs digital output ?

(5) While we test the single channel (OS1 & OS2). rest of the channel (OS3,OS4,OS5,OS6) can in floating or tied to ground?

  • 0
    TI__Mastermind 18550 points

    Hello Sheree,

    Thank you for your post. I am assigning it to the engineer responsible for this product. Please expect a response by 11/22/19.

    Kind Regards,

    Liaqat

  • 0 in reply to Liaqat Khan
    Prodigy 250 points

    Hi,

        Thanks for your reply & we are waiting for your feedback...

  • 0
    TI__Expert 4940 points

    Hi Sheree,

    1) The max voltage is 1.2V for CDS and PGA gain set to min. 1.2V volt is ADC range set by the upper-2.23V and lower-0.98V references.

    2&5) All unused inputs should be tied to VCLP_EXT with 10kohm

    3&4) ADC range full scale is 1.2V, first you need to calculate the voltage at ADC input based on the gain settings. In order to get meaningful data, all clock signal are needed. The ADC needs the clock and S&H timing.

    Trim pot noise level will be  high, ADC output data needs to be post processed. ADC performances can be checked using standard ADC characterization techniques.

    More useful for your application is generate a CCD type waveform with an arbitrary waveform generator synchronized with all clocks needed  by the AFE in order to check AFE system performances

    Regards,

    Costin