ADS7138: Making Fixed pattern generation feature work

Hello,

A screen shot of the communications would be much more useful to debug communications. This provides a visual to confirm that the communication is correctly reflecting the code.

this will also help confirm if the master is acknowledging the slave.

Can you try eliminating the reset and/or add more time before addressing it.

Is there pulls up on the I2C lines?

Are there any other devices on the I2C bus?

Regards

Cynthia

Attached is the PDF with i2c probe, i2c set_bit op code transaction ads7138_debug.pdfand schematic

updated the pdf with i2c bus scan

5672.ads7138_debug.pdf

Hello,

From the screen shot provided, you are using the SET BIT OPCODE (18xh) this only allows to change one bit in the register. but you are trying to set all channels which means all bits in the register need to be changed.

This means you need to change the OPCODE from SET BIT to Single Register Write (08xh)

regards

Cynthia

The data sheet on set_bit says following

8.5.2.2 Set Bit

The I2C master must provide an I2C command with four frames, as shown in Figure 16, to set bits in a register

without changing the other bits. The register address is the address of the register that the bits must set and the

register data is the value representing the bits that must be set. Bits with a value of 1 in the register data are set

and bits with a value of 0 in the register data are not changed. Table 9 lists the opcodes for different commands.

To end this command, the master must provide a STOP or RESTART condition in the I2C frame.

My understanding of this is that I can pass a bit mask and set all the bits using set_bit opcode and it actually works, when I read by the register, I do see 0xFF which tells me that all bits are set.

Do you think set_bit opcode should not be used to set more than exactly 1 bit in the reg ?

Hi Cynthia, 

Do you have a test script or recommended sequence of i2c transactions needed for FIX_PAT test and autonomous monitoring mode ?

PS:

using WRITE opcode (0x8h) doesnt help, for fixed pattern generation test, I expect to see 0xA5 pattern in regs 0xA0 to 0xAF, I see zeros

Data 0x00: 0xC1
Data 0x01: 0x04
Data 0x02: 0x80
Data 0x03: 0x00
Data 0x04: 0x00
Data 0x05: 0x00
Data 0x06: 0x00
Data 0x07: 0x00
Data 0x08: 0x00
Data 0x09: 0x00
Data 0x0A: 0x00
Data 0x0B: 0x00
Data 0x0C: 0x00
Data 0x0D: 0x00
Data 0x0E: 0x00
Data 0x0F: 0x00
Data 0x10: 0x10
Data 0x11: 0x00
Data 0x12: 0xFF

Data 0xA0: 0x00
Data 0xA1: 0x00
Data 0xA2: 0x00
Data 0xA3: 0x00
Data 0xA4: 0x00
Data 0xA5: 0x00
Data 0xA6: 0x00
Data 0xA7: 0x00
Data 0xA8: 0x00
Data 0xA9: 0x00
Data 0xAA: 0x00
Data 0xAB: 0x00
Data 0xAC: 0x00
Data 0xAD: 0x00
Data 0xAE: 0x00
Data 0xAF: 0x00

Hi Cynthia, I tried the following sequence

# clear SEQ_START
./volts_util --opcode CLEAR-BIT --offset 0x10 -b "0x10"

# clear CONV_MODE
./volts_util  --opcode CLEAR-BIT --offset 0x04 -b "0x60"

# Data_CFG : fix_pat set
./volts_util  --opcode SET-BIT --offset 0x2 -b "0x80"

# Set PIN_CFG with all channels as analog input
./volts_util  --opcode WRITE-BYTE --offset 0x05 -b "0x00"

# MANUAL_CHID set to 0x1
./volts_util  --opcode SET-BIT --offset 0x11 -b "0x01"

# SET STATS_EN and CNVST in GEN_CFG
./volts_util  --opcode SET-BIT --offset 0x02 -b "0x28"

# SEND CONV START FRAME (i2c raw read )
./volts_util  --opcode CONV-START

# READ 16 RECENT VALUE
./volts_util  --opcode READ-BLOCK --offset 0xA0  -x 16

Should I expect the 0xA5A5 pattern in 0xA0 - 0xAF registers or in the raw bytes that follow the Conversion Start frame ?

PS: In both cases I dont see anything and I feel I am doing something wrong with my sequence.

PS: The set-bit, clear-bit operations take bitmasks and are setting , clearing multiple bits in same operation, I mention this because, there was some confusion around this in the beginning of the discussion.

thanks

Bilahari

Hello,

The data output should be read at the RECENT_CHx_LSB or MSB registers. This is where the ADC data out is available.

Also note that in manual mode you will need to initiate each conversion.

The flow chart below shows the methodology to manual mode. If the registers are configured correctly then it seems that you are missing the read back and provide a new Channel ID and conversion start to then read the data again.

Regards

Cynthia

Hello Cynthia,

 I was finally able to use manual mode flow chart to verify both fixed test pattern (0xA5) and individual channel ADC values.

Posting my sequence here for future reference and for use of others.

# clear any brown-out condition
./volts_util  --opcode SET-BIT --offset 0x00 -b "0x01"

# Set PIN_CFG with all channels as analog input
./volts_util  --opcode WRITE-BYTE --offset 0x05 -b "0x00"

# Data_CFG : fix_pat test
#./volts_util  --opcode SET-BIT --offset 0x2 -b "0x80"

# Append channel id to ADC value
./volts_util  --opcode CLEAR-BIT --offset 0x2 -b "0xA3"
./volts_util  --opcode SET-BIT --offset 0x2 -b "0x10"

# set Manual mode using SEQ_START bits
./volts_util  --opcode CLEAR-BIT --offset 0x10 -b "0x10"

# Set manual mode for ADC conversion using CONV_MODE bits
./volts_util  --opcode CLEAR-BIT --offset 0x04 -b "0x60"

# MANUAL_CHID Select
./volts_util  --opcode CLEAR-BIT --offset 0x11 -b "0x0F"
./volts_util  --opcode SET-BIT --offset 0x11 -b "0x07"

# SEND CONV START FRAME
./volts_util  --opcode CONV-START --offset 0x00 -x 10

thanks,

Bilahari

Thanks Bilahari!

Glad that you can move forward, and thanks for sharing !

Regards

Cynthia