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Original question:

ADS1235: ADS1235 pin assign at Single-ended-input

ADS1235: ADS1235

user6228055
Prodigy 90 points
Part Number: ADS1235

Hi

I have some additional questions to the thread of the ADS1235 (pin assign at Single-ended-input).
That means to use AIN1..5 as single-ended inputs I have to connect e.g. +2.5V (mid range voltage) on AIN0, why should I not connect GND (AVSS) to AIN0? If I create the +2.5V reference on AIN0 by a resistor divider between AVDD and AVSS, do I have the same issues as I use the internal Vcom as reference?
Converting a ground referenced 0..+5V signal on AIN1 with a +2.5V reference on AIN0 end up in positive/negative converted digital data, right?

Summarized, what is the best and easiest way to use AIN1..5 as ground referenced inputs (0..+5V)?

Best Regards
Oliver

  • 0
    TI__Guru** 113765 points

    Hi Oliver,

    There are several things to consider such as the full-scale range with respect to measurement range, the dynamic range of the measurement and the input range with respect to common-mode.  If you can accept the lower input impedance with the PGA bypassed, then probably the easiest is to use 5V as the analog supply and the reference supply, then set one of the inputs to AGND (AIN0).  The result is you lose 1/2 of the full-scale range (negative half), but often times this is lost in the noise anyway depending on the data rate chosen. 

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Prodigy 90 points

    Hi Bob,

    thank you for your reply, but I have some more questions.

    1) If I don't bypass the PGA but use it with gain 1, the input impedance shouldn't be lower, right? (according datasheet page 6, max. 6nA @ V_AIN = 2.5V) What is the AINx input current on higher input voltages (couldn't find it in the datasheet for PGA gain 1)?

    2) Just to understand it correct, if I would need the whole full-scale range and connect +2.5V to AIN0 as the single-ended reference, I have to use an external 2.5V reference (REFP0 - REFN0)? With this configuration I would have an input voltage range of -2.5V .. +2.5V?

    3) Depending on your upcoming answers, I'm thinking about following configuration:
         - Using an external 2.5V reference (REFN0 to AGND, REFP0 to ext. +2.5V reference)
         - Connecting AIN0 to the same ext. +2.5V reference (single-ended reference)
         - Using AIN1-5 as single-ended inputs with input voltage range of 0 .. +5V (=> using full-scale range, all 24Bit)

    4) What happens if the analog supply voltage (AVDD - AVSS) fails but the external reference is still there? Does the ADC get destroyed? (datasheet page 4)

    5) What happens if the analog supply voltage drops below the recommended +4.75V (datasheet page 4)? Is it still working, but imprecisely? I don't want to use the ADC in that way, but regarding functional safety I'need to check all failure cases. How can I detect a failure on analog supply voltage (AVDD - AVSS) while the digital supply is in the proper range (DVDD > +2.7V)? For example, if  I use a +5V regulator to power the ADC (analog & digital) and connect the power good signal from the regulator to PWDN input of the ADC? The ADC doesn't respons on SPI if PWDN is low by hardware, right?

    A lot of questions, I hope you can help me, thanks in advance.

    Best regards
    Oliver

  • 0 in reply to user6228055
    TI__Guru** 113765 points

    Hi Oliver,

    See my responses below.

    Best regards,

    Bob B

    user6228055 said:

    Hi Bob,

    thank you for your reply, but I have some more questions.

    1) If I don't bypass the PGA but use it with gain 1, the input impedance shouldn't be lower, right? (according datasheet page 6, max. 6nA @ V_AIN = 2.5V) What is the AINx input current on higher input voltages (couldn't find it in the datasheet for PGA gain 1)? [Bob] Some of the information is best shown in a graph to show typical responses.  See Figure 29 on page 15 of the ADS1235 datasheet.  Using the PGA will result in a much higher impedance than compared to PGA bypassed.  There are trade-offs to consider.  When using the PGA you will see linearity issues as the PGA cannot drive all the way to the supply rails. This is demonstrated using equation 3 in the datasheet on page 24.  Bascically you trade higher impedance with reduced range of 300mV from the rails.

    2) Just to understand it correct, if I would need the whole full-scale range and connect +2.5V to AIN0 as the single-ended reference, I have to use an external 2.5V reference (REFP0 - REFN0)? With this configuration I would have an input voltage range of -2.5V .. +2.5V? [Bob] You would not necessarily need to use the same external reference for both the AIN0 input and the ADC but it is a good idea to do so.  And you are correct in that the full-scale measurement would be +/-2.5V relative to AIN0 in this case.  You would then add 2.5V to your conversion result to adjust for 0 to 5V input range.

    3) Depending on your upcoming answers, I'm thinking about following configuration:
         - Using an external 2.5V reference (REFN0 to AGND, REFP0 to ext. +2.5V reference)
         - Connecting AIN0 to the same ext. +2.5V reference (single-ended reference)
         - Using AIN1-5 as single-ended inputs with input voltage range of 0 .. +5V (=> using full-scale range, all 24Bit)

    4) What happens if the analog supply voltage (AVDD - AVSS) fails but the external reference is still there? Does the ADC get destroyed? (datasheet page 4) [Bob] You must adhere to the absolute maximum ratings for the ADS1235.  You need to make sure that the reference and analog inputs do not exceed 10mA of current through the ESD structures.  One method is to use a series resistance to limit the current.  The simplest is to use the same supply source for both the analog supply and the reference.

    5) What happens if the analog supply voltage drops below the recommended +4.75V (datasheet page 4)? Is it still working, but imprecisely? [Bob] The device will still be operational but performance will be degraded.  If the supply drops low enough the device will reset.  I don't want to use the ADC in that way, but regarding functional safety I'need to check all failure cases. How can I detect a failure on analog supply voltage (AVDD - AVSS) while the digital supply is in the proper range (DVDD > +2.7V)? For example, if  I use a +5V regulator to power the ADC (analog & digital) and connect the power good signal from the regulator to PWDN input of the ADC? The ADC doesn't respons on SPI if PWDN is low by hardware, right? [Bob]  You are correct in that when the PWDN is low the ADS1235 will not communicate.  You might consider using the RESET pin instead.  I think either would work, but the RESET pin might be a little cleaner when power returns.  In the end the status byte will show if a device reset has occurred.

    A lot of questions, I hope you can help me, thanks in advance.

    Best regards
    Oliver

  • 0 in reply to Bob Benjamin
    Prodigy 90 points

    Hi Bob

    Thank you, now it looks like a plan how to implement the ADC in our design.
    According question 1), using the ADC with PGA gain 1 more than 0.3V away from supply rails results in high impedance input I_in < 6nA (as shown in Figure 29, for gain 128)?
    Can you tell me the FIT rate of the ADS1235?
    If the Reset pin is set low, the ADC is in a similar mode like power down mode (SPI shut down)?

    Best regards
    Oliver

  • 0 in reply to user6228055
    TI__Guru** 113765 points

    Hi Oliver,

    See my responses below.

    Best regards,

    Bob B

    user6228055 said:

    Hi Bob

    Thank you, now it looks like a plan how to implement the ADC in our design.
    According question 1), using the ADC with PGA gain 1 more than 0.3V away from supply rails results in high impedance input I_in < 6nA (as shown in Figure 29, for gain 128)? [Bob] Just to be clear, if you reference your input to 2.5V using a 2.5V reference and enable the PGA at a gain of 1 you will see higher impedance.  However due to the PGA's inability to drive the amplifier output close to the supply rails you will be restricted to a valid measurement range of 0.3V to 4.7V (+/-2.2V relative to 2.5V).
    Can you tell me the FIT rate of the ADS1235? [Bob] This information is available by clicking on the Quality and packaging tab on the main landing page for the ADS1235 device.  There will be a table where you can click to View the FIT rate for the device.
    If the Reset pin is set low, the ADC is in a similar mode like power down mode (SPI shut down)? [Bob] When the RESET pin is held low, the device is held in a reset condition where the device cannot communicate.  So the short answer is yes.  The advantage in using the RESET pin as opposed to POWERDOWN is the ADS1235 will always cleanly restart from a brownout/blackout condition.

    Best regards
    Oliver