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ADS8867: Keep high for more than Tconv max time after start of conversion

hong jung
Prodigy 20 points
Part Number: ADS8867

The Tconv-max time is 8800ns in the datasheet.

What happens if I set the CONVST pin low to high for 3 wire operation and keep it longer than 8800ns?

Will existing conversions be ignored and new ones started?

In other words, I don't care if the sampling time is late.

After setting CONVST high, do other work.

Since then, changing it to low.

In this situation I would like to know if I can get the value correctly afterwards.

  • 0
    TI__Mastermind 45455 points

    Hi hong,

    I will answer your question on behalf of my co-worker(Keith) since he is on vacation now.

    The conversion on ADS8867 is initiated by the rising edge of CONVST signal and this causes the device to enter a conversion phase. The conversion data will be shifted to SDO line with available SCLK signals, also CONVST should be pulled down to low for reading the data for 3-wire operation as chip select. There is no new conversion unless a new rising edge is seen on CONVST. Hence, you can do other work as long as CONVST is still high and no SCLK is sent to ADC.

    Regards,

    Dale

  • 0 in reply to Dale Li
    Prodigy 20 points

    Yes. I got it.

    Thank you for your fast reply.