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ADS8556EVM: "BUSY" is always high

Part Number: ADS8556EVM

I'm trying to get a simple conversion from the ADC8556EVM.  The analog supplies are +/-5V, and the digital supply is +3.3V.  I have set the board switches to HW mode, Parallel interface.

I apply a conversion start pulse to the three middle pins of JP9 to start the conversion of all 6 AD converters (the yellow pulse in the screenshot).  The busy line remains "HIGH" always (the blue trace in the screen shot).  I set the ADC_CS and ADC_READ lines to HIGH during this process (they will be set low after the BUSY line goes low, but that never happens).

I'm out of ideas as to what to troubleshoot (this is basic, but I can't get it to work) - what am I missing? 

  • Update: I see that the DC_CNTL line (J4, pin 1)  needs to be tied HI so that the STBY# line is high.  I wish the EVM documentation stated exactly what the DC_CNTL line was for - it would have saved a lot of time.

    However, the problem still remains with the BUSY signal.  Now, the BUSY line is always low after a Conversion start pulse.  I still see no activity on it in parallel + HW mode.  Here is a screenshot with the STBY pin (pin 24) high.  Blue trace is Conv start pin (tied to HOLD_A#, HOLD_B#, and HOLD_C#), and yellow trace is on DC_INTa (J4, pin 19).  First screenshot show the Conv_start square wave, and second is zoomed in on the positive edge of Conv_start to show that there is no activity on the DC_INTa pin.

  • I will answer my own question:

    The issue is with the 6 analog inputs (all located on J2).  When I use dip jumpers to connect all 6 inputs (J2, pins 2, 4, 6, 8, 10, and 12) to ground, the BUSY interrupt now appears after each conversion pulse.  I have NO idea why this is, but there you go.

  • Hi Richard,

    I apologized for late response because of holidays. J2 on the EVM board is used to short input signals to the ground and it should not be related to the device. I have few questions and suggestions:

    1. You said 'analog supplies are +/-5V, and the digital supply is +3.3', I guess that you mean 'HVDD=+5V and HVSS=-5V,BVDD=+3.3V', did you provide a analog power supply to AVDD?

    2. There is a control logic for digital signals on the EVM, so make sure your control signals for ADC's all input pins are applied to the ADC directly including /STBY signal. Also, please check SW1 settings.

    3. Measure and capture the signals on the pins of ADC instead of the pins of connector. Check the voltage on REFIO and REF_x pins.

    4. Looks like your CONVST_x(HOLD_x) high level is around 50us in your latest screenshot, please confirm.

    Regards,

    Dale