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ADC128D818: Interrupt behavior

Eddie Koh
Genius 10635 points
Part Number: ADC128D818

Customer using 3 x ADC128D818. Pin 6 (INT) of all 3 x ADC128D818 are tied together, 10Kohm pullup to 5V. They are simulating fault conditions on one of the 3 ADC.

 

1. Customer saw a behavior of pulsing high -low signal on the interrupt pin while simulating fault conditions.

- More details, schematics available over email. 

 

Is the pulsing high-low  signal on INT (pin 6) expected when one of the device see a fault?

  

2. When the master(MCU) issue a clear fault command, behavior is not consistent with the statement in Table 4 of datasheet (INT_Clear row)

 

Initial conditions: -fault state(simulated input voltage is above high limit, continuous), and Interrupt status register is periodically red.

Then, Monitor the INT (pin 6): - INT is toggling high-low-high continuous. ( this is after “Interrupt status register is periodically red”)

Is this a normal behavior for the interrupt?

Our understanding is the interrupt pin will remain low until the cleared by the INT_Clear bit?

 

  • 0
    TI__Mastermind 25020 points

    Hello Eddie

    Feel free to email me with any pertinent information.

    The interrupt pin is a digital output that is triggered with the internal watchdog registers meet the voltage or temperature levels that have been set.

    The interrupt pin can indeed seem to pulsate when the device is in a fault condition. (page 30-31 in the datasheet speaks more to this)

    I would suggest reading the Interrupt Status Register to see what is triggering the interrupt. Table 5 in the datasheet can help with this.

    Reading the Status Register clears the contents of the register. then the interrupt pin is also cleared, but can then become triggered again if the condition is still present. It will be necessary to know what is triggering the interrupt.

    The interrupt pin can also be cleared by setting the INT Clear bit.

    Seeing how this is a simulation though, I would also suggest double checking how the simulation triggers an interrupt, and how the interrupt itself was created

    Regards

    Cynthia

  • 0
    TI__Guru* 97825 points

    Eddie,


    The /INT pins becomes active under three conditions that must all exist. First, /INT_Clear (00h[3]) should be 0. Second, /INT_Enable (00h[1]) must be 1 (to enable the interrupt). Third, the output data should be higher than the high limit or equal to or lower than the lower limit. If there is a temperature reading, then it must be higher than the Thot limit. This is all described on page 30 of the datasheet.

    When an error occurs, I'm not sure but I believe that there should be a pulsing at the data rate. This is implied in Figure 35, showing the temperature response structure.

    I'm not sure I understand your second comment, I would say Table 4 isn't worded very well. Looking at the /INT_Clear line, if /INT_Clear is set to 1, then I believe this would disable the /INT. If you look at Figure 34 (again on page 30), you would see that /INT_Clear set to 0 passes the signal through. A value of 1 blocks the /INT function.

    I'm not sure this completely answers your question, so if you want to follow up, You can post back.


    Joseph Wu