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ADS8568: Interfacing ADS8568 with AM5708 SPI interface

Part Number: ADS8568
Other Parts Discussed in Thread: AM5708,

Hi,

We connected ADS8568 to TI AM5708 processor in serial, hardware configuration mode and single conversion signal for all 4 channels. I am able to observe the busy signal transition from low to high and then to low after the giving conversion signal high. I am trying to read the data on spi bus after observing the busy signal, but I am getting all zero's on SPI MISO signal(SDO_A/DB12 pin), procedure I am feeling:

1.Make conv signal high

2.Check busy signal

3.Read conf reg on SPI bus, but all the receive buffer is zero.

And even I tried for reading configuration register value, for that also I am getting all zero's on SDO line, the procedure I am following for conf reg read:

1. Make conversion signal low

2.Send 0xC00083FF on spi bus

3.Make conversion signal high

4.Read conf reg on SPI bus, but all the receive buffer is zero.

The clock polarity is CPOL=1, CPHA=0 and the signals are same as mentioned in the post https://e2e.ti.com/support/data-converters/f/73/t/765334?tisearch=e2e-sitesearch&keymatch=ads8568

What I am doing wrong and What is the endianness of SDI line?

Regards,

Naveen.

  • Hi,

    I suppose when ADC is in Hardware mode, I can't read the conf register(HW/SW pin is connected to ground and gpio pin is not connected in our design).

    To modify my earlier question, how to read the conversion data from ADC on SPI (AM5708 with ADS8568)?

    After the conv signal high, busy signal is going from low to high and then high to low(busy signal transition time period is very low that I am not able to capture in software, I monitored in oscilloscope. After that I am trying to read data on spi by sending dummy data MOSI line but the MISO(SDO) is always low, no data on MISO. As per the figure 1 in data sheet I can directly read the spi data after the busy signal.


    SPI clock frequency is 30 MHz, single conversion signal for 4 channels, SEL_B, SEL_CD is connected to ground, All data should be available on SDO_A pin,

    tried with all 4 SPI clock phase and polarity types. Unfortunately I am unable to monitor the FS(Chip select) due to hardware and in AM5708 I don't have any control on CS0 as it's taking care in SPI controller itself. I am working on DSP baremetal application to interface with ADS8658 and I am not seeing any options for changing the CS0 except the pad settings.

    Below are SPI pad settings:

    /*Pad configurations */

    HW_WR_REG32(0x4A0036A0, 0x0004000E); //ADC_BUSY signal, page no: 4675: CTRL_CORE_PAD_XREF_CLK3

    /*SPI2*/
    HW_WR_REG32(0x4a0037C0U, 0x00020000); //SPI2_CLK, page no: 4771: CTRL_CORE_PAD_SPI2_SCLK
    HW_WR_REG32(0x4A0037C8, 0x00000000); //SPI2_MOSI, page no: 4774: CTRL_CORE_PAD_SPI2_D0
    HW_WR_REG32(0x4A0037C4, 0x00040000); //SPI2_MISO, page no: 4773: CTRL_CORE_PAD_SPI2_D1
    HW_WR_REG32(0x4A0037CC, 0x00020000); //SPI2_CS, page no: 4776: CTRL_CORE_PAD_SPI2_CS0
    HW_WR_REG32(0x4A003718, 0x0002000E); //SPI_Convert page no: 4716, CTRL_CORE_PAD_MCASP2_AXR5, gpio6_7 - output
    HW_WR_REG32(0x4A003714, 0x0000000E); //SPI_RST page no: 4714, CTRL_CORE_PAD_MCASP2_AXR4, gpio1_4 - output
    HW_WR_REG32(0x4a0097F8, 0x00000002); //SPI2 Clock Enable

    while ((HW_RD_REG32(0x4a0097F8) & (0x00030000U)) != 0x0);

    Regards,

    Naveen.

  • Hi Naveen,

    I apologize for the delay in response here, I've looped in another engineer to help with your query. 

  • Dear Alex,

    Thank you for the reply, I solved the issue, there are some software and hardware issues.

    Now I need one help, we are planning to use SPI with DMA in AM5708 for reading data from ADC, is there any way you can help in this. What I need was I need some example code fro Am5708 to read the SPI with DMA using baremetal application, I am only able to find examples with for TI -RTOS, no examples are available for baremetal application.

    Regards,

    Naveen.

  • Hi Naveen,

    Sorry, but we do not have example code to provide for this device.

    Regards,