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Hi,
I am interfacing with a DAC8168 without using the CLR_N and LDAC_N pins. Reading through the datasheet I understand that when a Software Reset is sent through SPI the default clear code (initial scale 0) is written. My question is, if as soon as the Software Reset is process at the 32nd end, does the output goes to 0, or do I need to send a Write to Clear Code ignore CLR_N pin in order to update the output. If not, do I need to sent a software LDAC_N and update all DAC registers?
The registers for reference are:
Bonus: If I am not using the LDAC_N pin do I need to override it, in order to update the output or does using the Write to selected DAC Input Register and Update Respective DAC Register works as a SW_LDAC_N ?
Hi Diego,
My colleague will get an answer to you as soon as they can, likely Monday morning.
Thanks,
Paul
Hi,
Which package are you using for this device? TSSOP14 or TSSOP16? Why I am asking this is, in TSSOP14 you don't have LDAC and CLR pins.
Assuming you are using TSSOP14 (without LDAC and CLR),
Asynchronous mode uses the /LDAC pin to time for simultaneous DAC updates. Using software, the LDAC register can be used to allow flexibility to control the selection of which DAC channels will be updated when the /LDAC pin is brought low. Using the TSSOP-14 package, there is no /LDAC pin and no way to control the DAC in asynchronous mode.
Having said that, if as soon as the Software Reset is process at the 32nd end, output goes to 0. As soon as the software reset is executed, write function will be aborted and all DAC channels are reset to the power-on reset code(power on reset to zero scale for grades A and C; power on reset to mid scale for grades Band D)
For the second question, If I am not using the LDAC_N pin do I need to override it, in order to update the output or does using the Write to selected DAC Input Register and Update Respective DAC Register works as a SW_LDAC_N ?
No you cannot use this mode in a device without LDAC pin. Only possible through LDAC pin and software.
If you are using device without LDAC pin, data will be updated on the falling edge of 32nd SCLK. Corresponding DAC channel will be updated with new value
If you are using device with LDAC pin, both synchronous and asynchronous modes are possible. Please see datasheet 46 for more information.
I suggest using a device with LDAC pin because it offers flexibility for operation using software as well as hardware.
Let me know this helps. May I know what kind of application you are targeting with this device?
With Regards,
AK
Could you clarify the 2nd answer? If I am using the TSSOP-14 package, the synchronous and asynchronous options are not available. Hence, it's always on synchronous mode, so I wouldn't need to write to the LDAC register in order to override the pin (since there's no LDAC pin) ? Nor do I need to use the write to selected register and update respective register command just the update DAC register since it will update at the 32nd falling edge ?
Hi,
SInce there is no LDAC pin you dont need to write to the LDAC register, DAC will be updated synchronously on the falling edge of 32nd clock cycle.
I hope this clarifies your question regarding LDAC functionality.
Regards,
AK