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DDC232: Offset Mismatch

David Shumate
Expert 7985 points
Part Number: DDC232

Hi Team,

We have the board up and running with DDC232CK. However, under test condition (test bit on , all input channels are disconnected) we are getting 0x1E00 instead of 0x1000 offset.

We think it might has to do with the output format. Datasheet indicates for format=1, there should be 19 bits instead of 20 bits for DDC232CK. The above readings were assumed output bits to be full 20bits.

 If the output word is supposed to be 19 bits, the question is should we read out bits [19:1] ? or bits [18:0] or any other ways within the 20bit output word?

Thanks!

David

  • 0
    TI__Expert 4680 points

    Hi David,

    That is interesting... Just to first clarify the 19b, that is only to indicate, as you highlight in the pic, the "19b no missing codes", i.e., if you took this as a 19b coverter (i.e., combine the words that finish in zero and the ones that finish in one, as long as all the other 19 bits are the same), there wouldn't be any missing codes (you would have counts with that code).

    It does not mean that the output switches to 19b for some reason. So, you still should get the 20b output. It is "funny" that when you switch to test mode, disconnect the input, the offset jumps from 4096 to 7680. Do you change anything else? And are you doing this in Range 7 (spec condition)?

    Also, it is a bit of a coincidence, but it is funny that you get 0x1000 (4096) when not in test mode. Do you get that exactly or you were just rounding? I mean, that is the exact ideal output...

    Regards,

    Edu