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DAC80501: Clarification on SPI commands

Part Number: DAC80501

Hello,

I'm trying to choose a DAC for a project and wanted to understand how the DAC80501 is programmed via SPI.

The data sheet shows that during each SPI transaction, 24-bits are sent from the master to the DAC via the SDIN pin. It is not clear how the 24 bits should be structured though.

Do we first send the command byte (bit 23 to bit 16) then the data bits (bit 15 to bit 0)? 

Hoping it's as simple as that! Just wanted to verify before investing the design/development time. Thanks.

  • James,

    That is correct. The DAC data is left-aligned, so the 16-bit device of course uses all of the lower two bytes but lower resolution products would leave the LSBs empty. I see your complaint in the documentation and will provide feedback to the document owner.

  • Thanks for the info Kevin.

    One last question: do you have any information about the digital interface electrical characteristics? (i.e. Input High/Low Voltage) I can't seem to find these in the data sheet. Wondering if it's possible to run the chip from a 5V VDD but use 3.3V logic levels.

  • James,

    We have designed this device in such a way that, customers don't need to use any level translators if they are operating with lower levels than VDD.

    In your case VDD = 5V and logic levels can be at 3.3V because device has got a fixed VIH and VIL levels (1.62V and 0.45V respectively) independent of VDD.

    Yo can go as low as 1.8V logic levels with this device, keeping your VDD at 5V, No issues at all.

    Regards,

    AK

  • Perfect, that answers my question. Thanks for the quick reply!