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DAC7718: Time to write each channel of the DAC7718

Part Number: DAC7718

Hello DAC team,

We are working on a project where we are writing to all channels of the DAC7718 at an 8MHz SPI clock. We have 10 DAC7718s in our circuit and we need to make sure that the data is written to each DAC in under 350uS.

The settling time of the DAC is 15uS as per the datasheet so we were wondering if the MCU needs to wait for 15uS per channel before writing to the next channel or that the settling time will move forward independently while the MCU can write to the next channel?

Ideally at 8MHz writing a data of 24 bits will mean ~35uS per DAC and hence ~350uS for 10 DACs. If we include a 15uS delay for every channel we will go all the way up to 150uS + 35uS = 185uS per DAC and hence 1850uS for 10 DACs which is not acceptable for our project.

Can you please advice on how we can stay within 350uS?

Thanks

Ambimat Team

  • Hello,

    I need to understand your write sequence bit more. I understood in someway from your query, correct me if I am wrong here.

    1_CH1, 1_CH2, 1_CH3 .....1_CH7 (Where 1 stands for 1st DAC) and then you start 2nd DAC and so on and so forth?

    or 1_CH1, 2_CH1,3_CH1....10_CH1  and then you start 2nd channel?

    In both cases you are anyway giving enough time for Channels to settle before you come back and update the code. I don't see any probelm here.

    For your question ( The settling time of the DAC is 15uS as per the datasheet so we were wondering if the MCU needs to wait for 15uS per channel before writing to the next channel or that the settling time will move forward independently while the MCU can write to the next channel?)

    Settling time will move forward independently since you are not trying to write same channel again immediately, I assume you will update remaining channels and other DAC's and comes back and update the first again.

    For more clarity, can you please provide us with timing diagram how you are planning to update all 10 DAC's and 8 channels?

    Regards,

    AK

  • Akhilesh K said:
    1_CH1, 1_CH2, 1_CH3 .....1_CH7 (Where 1 stands for 1st DAC) and then you start 2nd DAC and so on and so forth?

    This is what we are trying to do.

    Akhilesh K said:
    Settling time will move forward independently since you are not trying to write same channel again immediately, I assume you will update remaining channels and other DAC's and comes back and update the first again.

    This is what we also thought but we just wanted to confirm the same.

    Akhilesh K said:
    For more clarity, can you please provide us with timing diagram how you are planning to update all 10 DAC's and 8 channels?

    Let me share the timing diagram in a bit

    Thanks

    Ambimat

  • Hi Neel Shah,

    I believe you got your answers clearly. I am closing this thread, feel free to open this discussion thread, if you need assistance in future.

    Regards,

    AK