Hello DAC team,
We are working on a project where we are writing to all channels of the DAC7718 at an 8MHz SPI clock. We have 10 DAC7718s in our circuit and we need to make sure that the data is written to each DAC in under 350uS.
The settling time of the DAC is 15uS as per the datasheet so we were wondering if the MCU needs to wait for 15uS per channel before writing to the next channel or that the settling time will move forward independently while the MCU can write to the next channel?
Ideally at 8MHz writing a data of 24 bits will mean ~35uS per DAC and hence ~350uS for 10 DACs. If we include a 15uS delay for every channel we will go all the way up to 150uS + 35uS = 185uS per DAC and hence 1850uS for 10 DACs which is not acceptable for our project.
Can you please advice on how we can stay within 350uS?
Thanks
Ambimat Team