ADC128S102QML-SP: Floating CMOS Input Pins (SCLK, /CS, DIN)?

Jeffrey Boye

Can the ADC128S102QML-SP tolerate floating its digital input lines (SCLK, /CS and DIN) indefinitely without damage or degradation in reliability/lifetime to the part? This thread seems to indicate the answer is yes (assuming /CS is pulled high to avoid an erroneous transaction) however that was in response to a similar inquiry for the commercial non-SP (space) version of the part.

Thanks and looking forward to your prompt reply,

- Jeff

over 5 years ago

0 Cynthia over 5 years ago

TI__Mastermind 25020 points

Hello Jeff,

The thread you referenced is correct. The CS can be thought of as enable, thus while it is high, the other pins can be left floating.

While the CS is high the SCLK is gated off, as well as the SDO, which is high impedance. The SDI pin can also be left floating

Regards

Cynthia

0 Jeffrey Boye over 5 years ago in reply to Cynthia

Prodigy 35 points

Cynthia,

Thank you, that response is very helpful! In my application, the /CS line floats for about <300 ms on power on (and is in a valid logic state the rest of the time). Is this still okay? I realize the device may erroneously begin a conversion cycle or just generally think it's being talked to but as long as there is no risk of damage or device degradation, my application does not care.

- Jeff

0 Cynthia over 5 years ago in reply to Jeffrey Boye

TI__Mastermind 25020 points

Jeff,

The device will not be damaged. As long as you are aware of the possible communications, then the device should be fine

0 Jeffrey Boye over 5 years ago in reply to Cynthia

Prodigy 35 points

Excellent, thank you that answers all of my concerns.

- Jeff

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ADC128S102QML-SP: Floating CMOS Input Pins (SCLK, /CS, DIN)?