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Application note request for DAC5670

 

Dear Team,

One of my customer  using DAC5670.

I could find only the datasheet in the website.

Can you please send me any application note or reference design on this device.

Also I require suggestions on clocking this DAC and can you also assist me in chosing a regulator for this.

 Apart from this the following pin description is missing in the datasheet :a5,a12,b5,b12 & c5. Please clarify on this.

Best Regards,

Amit Mane

  • Amit,

    There is an EVM users guide that is in the queue to be generated/released.  I expect this will take a little time before this is ready.

    However, the DAC5682 EVM is very similar, and can be used as a reference until this document is available.  http://focus.ti.com/docs/toolsw/folders/print/dac5682zevm.html

    There are many LVPECL clock drivers available.  For best solution, a clock driver/jitter cleaner would provided the cleanest clock.   These can be viewed by using the selection tools starting at http://focus.ti.com/analog/docs/clockandtimershome.tsp?familyId=346&contentType=4

    If a PLL based solution is desired, then select this on the left.

    Selection of clock driver will depend on other needs on the board.  ie, is this the only clock required, or will a multiple outputs be required for other clock loads.

     

    I am investigating the missing descriptions on the pins.   More than likely they belong to the no/connect category, but I will confirm.

    Regards,

    Wade

     

  • Amit,

    The missing pins will be updated in the datasheet shortly.   They are test pins, and need to be biased as follows.

    C5,B12  - No connect

    B5,A5,A12 - Ground

    Regards,

    Wade