Hi, staff
Timing adjustment (TADJ_x_FGx)
The data sheet recommends the use of INA (A input side) in single channel mode, but also plans to use INB (B input side) in single channel mode.
We think that the calibration mode needs to adjust the foreground mode (TADJ_x_FGx).
Adjust using the “TADJ_A_FG90” and “TADJ_B_FG0” registers of “Inter ADC core timing” shown in Table4.4 of the data sheet (SLVSEH9) page76 Table4.4.
Question
1. Write the adjustment value to the 8bit register of “TADJ_A_FG90” and “TADJ_B_FG0”.
What is the adjustment resolution per 1 LSB of this register of 8 bits?
2. What is the adjustment range that can be adjusted with the 8Bit register?
3. If I rewrite this register during operation, is the setting reflected as it is?
Or do you need to take any additional steps to make it work?
(When is it set?)
4. I plan to use only foreground calibration, do I need to use background calibration as well?
(What are the benefits?)
best regards
cafain