Hi Champs.
according to the datasheet, chapter 11.2, we specify the rise time for the voltage at power on or power cycle to be max 1000ms.
Can we provide further information why we have this requirement or what happens when this is being violated?
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Hi Champs.
according to the datasheet, chapter 11.2, we specify the rise time for the voltage at power on or power cycle to be max 1000ms.
Can we provide further information why we have this requirement or what happens when this is being violated?
Hi,
Generally speaking, for POR event, you should worry only about the min requirements for ramp up not max ratings. In order to ensure a POR event, VDD must be below their corresponding low thresholds set internally by the capacitors for at least 100ns . If there is fast ramp up, we cannot guarantee a POR event. Now coming back to max ratings, it shouldn't matter. You can ramp up and ramp down power supply voltages as slow as you want, once it crosses threshold, definitely POR will happen.
Anyway I will check with Design team why there is a max rating attached to this specification.
Regards,
AK