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ADC Programmable Gain Amplifier (PGA) Principal?

Bin Qu
Prodigy 30 points
Other Parts Discussed in Thread: VSP2562, ADS1232

Hi, There,

     I am working on the ADC vsp2562. But I still can not figure out the principal of Digital  Programmable Gain Amplifier (DPGA).  The input of DPGA is the output from ADC, which is a digital number. I can not imagine how to amplify a digital number. By multiplexer? Or by a huge look up table?

    Anyone knows the schematic of the DPGA block? Or any simplifier block diagram?

Thanks!

Bin

  • 0
    TI__Expert 6925 points

    Hello Bin,

    In general, a Programmable Gain Amplifier has three types of connections:
    (1) Analog signal inputs
    (2) Analog signal outputs
    (3) Gain setting digital inputs

    Therefore, it doesn’t amplify digital numbers. In typical amplifiers, external resistors are used to setup the gain, but in a PGA, the resistors are internal and are connected differently depending of the digital code that programs the gain. 

    Regards,

  • 0 in reply to Rafael Ordonez
    Prodigy 30 points

    Thanks, Rafael.

    But according to VSP2562 data sheet, the DPGA is located after a 16-bit ADC. Also it describes an extra A-PGA to control CDS gain, which obviously shares the same function as you described in the ADS1232.

    I am still confused what inside of the block DPGA is. Because output 12-bit digital data come out directly from this block.

     

    Bin

     

     

  • 0 in reply to Bin Qu
    TI__Expert 6925 points

    Hello again Bin,

    I apologize for misunderstanding your previous post. I couldn’t find the part you were referring, and that led me to believe that your question was about typical PGAs.

    After finding the right part and reading its datasheet, it seems to me that the DPGA is simply using a mathematical function that multiplies and rounds the 16bit ADC to a 12bit output. Unfortunately, I cannot understand either how this done, so I’m going to move this post to the Image Capture forum ( http://e2e.ti.com/support/other_analog/imaging_afes/default.aspx ) were the experts in this part should be able to clarify this.

    Regards,

  • 0 in reply to Rafael Ordonez
    TI__Expert 3370 points

    Bin,

    The VSP2562 (and most other VSP products) have both analog and digital gain. The analog gain is before the ADC and typically is in 3 dB steps. The purpose is to amplify the incoming signal so as to make use of the full rage of the ADC. This minimizes quantization errors of the ADC and allows for a larger dynamic rage in the digitized signal.

    The digital gain (DPGA) operates on the digitized data after the ADC. The operation is essentially a multipler with controlled reduction of the output value to the number of bits output by the device. In the case of the VSP2562, the internal ADC is 16 bits and the internal multiplier is of greater than 16 bits output. The multiplier output is then reduced to 12 bits output.

    Digital gain is typically in smaller increments, a few hundredths of a dB, to allow for precision adjustment.

    Note that the two gains are set independently in separate registers. The total system gain is the product of the two gains.

    Regards,

    Werner

  • 0 in reply to Werner Metz
    Prodigy 30 points

    Thank you Werner.

    So in short, the DPGA is kind  of a multiplier, which convert a digital number to another one. Using float point multiplier?

    It's really cool that TI could make a multiplier in such a  small size, even within a ADC.

    Bin 

  • 0 in reply to Bin Qu
    TI__Expert 3370 points

    Bin,

    Yes, it is amazing. Multiplier is designed with sufficient bits that no rounding errors occur and area is small!

    Regards,

    Werner