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AMC1210: Sequence for setting the high level threshold during run time

Part Number: AMC1210

Hello,

I would like to set the high level threshold during run time (say, 10ms task).

What would be sequence of register control to write the high level threshold value without distrubing the comparator operation during running (like, turn off the comparator, change the setting and turn on the comparator again).

Register setting that used in the initialisation,

AMC1210_CONTROLPARAM_FLT0_CFGVAL (0x0000u)
AMC1210_SINCFILTER_FLT0_CFGVAL (0x0F3Fu)
AMC1210_INTEGRATOR_FLT0_CFGVAL (0x053Fu)


AMC1210_HIGHLEVELTHRESH_FLT0_CFGVAL (0x7FFFu)
AMC1210_LOWLEVELTHRESH_FLT0_CFGVAL (0x4000u)
AMC1210_COMPPARAMETER_FLT0_CFGVAL (0x03BFu)

AMC1210_CONTROL_CFGVAL (0x6000u)
AMC1210_CLKDIVIDER_CFGVAL (0x0800u)

  • Hi Arshad,

    Once the AMC1210 filter is running (MFE enabled for example), there is no deterministic way to simply update the comparator trip level.  Not sure if you are using serial or parallel mode, but you won't necessary know where you are in the cycle to ensure you don't hit a filter output update while you are in the middle of writing to the registers.

  • Hi Tom,

    Just for information: I am using serial mode.

    As a conclusion what i understood as follows:

    We can write into threshold register at any time.

    Please revert back if my understanding is wrong.

  • Hi Arshad,

    The AMC1210 filters update on the fly, by that I mean there is no internal function to lock out updates to the output buffer while you read from or write to the registers.  That being said, yes - you can update the threshold register 'on demand' but you may see a fault posted should that happen during a buffer update.

  • Hi Tom,

    You had mentioned at there is no filter outdate update as the fault scenario.

    There are two scenario which I thought for this,

    1. It means, there is no INT update in the cycle in which registers are updated and will respond on the next cycle.

    2. Is there any chance in which write to register can be discard with SPI no error and then read back of written value and compared with write value result in data mismatch error(in our test, we had experienced a sporadic error while updating the threshold register dynamically)

  • Hi Arshad,

    The output data registers are updated based on how you have the SOSR and ISOR  values configured.  Let's say for instance that you started an SPI sequence to read out the data registers just before a new update took place.  What you could possibly get is a mixture of old and new data during that read cycle.  The same is true for changes to the threshold register values, if you change the levels in the middle of a data register update from the filter module, you might get a fault flag.  That is what I meant by there not being any internal 'lock out' mechanism (internal to the AMC1210) to protect the register contents while an active read or write is taking place.  To avoid this, at least when reading from the data registers, you need to ensure current data is collected before ACK goes active.  Short of stopping the clock or clearing the MFE bit, changing the threshold register immediately after a data read and before a data register update might work. 

    I've never had anyone try to change the threshold levels on the fly before - most of the applications I seen with the AMC1210 simply set the values during the initialization stage and leave them be.

  • Hi Tom,

    Thanks for your deedback. This issue can closed.