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ADS1256: How to drive SCLK after an RDATA command?

Fredda
Intellectual 625 points
Part Number: ADS1256

After an RDATA command, can you drive SCLK eight periods and then paus for a while and so on until you have read all 24 bits that make up a sample? Or do I have to drive it without paus?

/F

  • 0
    Intellectual 625 points

    Same question goes for the WREG and RREG commands. Or let me rephrase the question. Can I drive SCLK continuously while reading or writing all registers? The timing characteristics table for figure 1 in the datasheet gives the delay needed between commands (t11) and between DIN and DOUT (t6), but it doesn't say anything about the delay between data bytes.

  • 0 in reply to Fredda
    TI__Guru 52296 points

    Hi Fredda,

    Specifically with regard to the reading data, there is no need for a delay between bytes, but at the same time adding a delay will not cause issues as long as data is clocked out before the next /DRDY pulse when using RDATAC mode.

    Please be sure to respect all required delays between specific commands as outlined in the datasheet e.g. t6, t11, etc.

    -Bryan

  • 0 in reply to Bryan Lizon86
    Intellectual 625 points

    Thanks. I've tried both with and without delay between bytes and it is working.