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ADS127L01: SPI register access in daisy chain configuration

Part Number: ADS127L01

Hi,

I‘m already using and ADS127L01 in SPI slave mode. Everything works as expected. Now a new project needs to connect multiple devices in daisy chain mode across an isolation barrier. Also the hardware configuration PINs (OSR, FLT ) shall be configurable in this application. Because these settings are read/only in the config register, and the number of PINs through the isolation barrier is very limited, the idea is, to set the mode pins, with an external shift register, which is connected in parallel to the ADS127L01.

Table 19 of the data sheet lists six valid SPI-commands. What happens if any other command ist clocked into the device during operation? I didn‘t find any recommendation, which data is allowed to clock into device during reading out ADC-samples. (0x00, 0xff… or just different from valid SPI commands?)

The plan is, to use some reserved codes, which are not decoded by the chip to transfer the hardware settings through the isolation barrier without the need of isolating additional signals…

Here are my questions:

1. Is it possible to clock in safely every undefined command into the Device?

2. or is there any bit sequence which can be safely used? The MSB of each command seems to be zero zero??

3. Is there any suggestion how to program individual calibration values in different devices in daisy chain mode? (without using different chip selects….)

Best regards

Klaus Schober

  • Hello Klaus,

    Welcome to the TI E2E community!

    1.  I would suggest that, when sending data to the external shift registers, pad the transfer frame with 8 zero's first, and then whatever data you need to send.  This is the default command to get conversion data back from the device.

    2.  Use 0x00h, since the commands are processed on the first 7 or 8 MSBs clocked in after /CS goes low.

    3.  When using daisy chain, you can only write the same commands or values to each ADC; there is no daisy chain support for MOSI line, just the MISO line.  If you need to write different values to each ADC, i.e. gain and offset values, then you will need some way to individually control each CS  line.

    Regards,

    Keith Nicholas
    Precision ADC Applications

  • Hello Keith,

    thank you very much for your quick response. It gives me some hope, that following solution should work: A number of ADCs is put in a daisy chain configuration, (each separated through an isolation barrier). A simple 8 bit shift register with an output latch is connected in parallel to DIN and SCK of each ADC. So exactly the last 8 bits of each transfer could easily latched with the rising edge of CS. Because only 6 bits are needed, it should be possible to send a configuration byte “11xxxxxx” to the shift register at the end of every transfer, without influence to the ADC. Some extra logic could generate a individual CS for each ADC, shift register combination (to program individual calibration values) or a common CS for all devices (read out in daisy chain mode). To make sure, that this solution works I have some more questions.

    1.) Is it safe to send codes 11xxxxxx (bit 7 and 6 set to 1) (bit 5 to 0 variable) at the end of every transfer. Are there any other undocumented commands which are decoded by the chip?

    2) Could the start/stop 0000100x/0000101x command be extended by a reserved code 11xxxxxx? (input value for the shift register..) without influence to the behaviour of the ADC?

    3) You said commands are only decoded at the 7th or 8th bit after the falling edge of /CS. The data sheet says that /CS can be tied to GND, if there is only one device connected. If /CS is kept low, in which situations does the chip accept additional commands?

    4) Do I need to send a RDATA command byte to ADC before reading out a new sample, or is it enough to input any reserved command while shifting out the new ADC result, even if /CS has been disabled between two cycles?

    4) Is it possible to read out the configuration registers of all devices in daisy chain mode by the RREG command “0010 rrrr”? If the command is supplied to all devices in parallel, every chip should clock out the addressed register(s) to its DOUT and to the DAISY_IN of the next device. Are they shifted through the complete device chain (by applying additional clock cycles...) and can be seen at the last DOUT?

  • Hello Klaus,

    I need to correct my prior response.  The command processor inside the ADC will continue to interpret data as commands for every 7 to 8 clocks, so my initial recommendation will not work.

    We have not tested or verified operation of the device for multiple invalid command inputs, so it is not advised to send multiple random values.  However, one approach that will work is to use the RREG command.  After the 16th SCLK for the RREG command, the device will ignore any further data on the DIN pin.  So you can send a RREG command to read an invalid register, and then clock in the data for your external shift register connected in parallel to the SPI bus.

    For example, you can send the following bit sequence:

    0x00101000 00000000 xxxxxxxx

    Read from register 8 (invalid register), number of registers 1, xxxxxxxx are 8bits intended for the external shift register.  Since this is a read command to an invalid register, DOUT will read 0.

    Regarding your question 4, the ADS127L01 only supports reading of conversion results in daisy-chain mode.  You can read back the register contents of the first device in the daisy chain, but you will not be able to read the results from the other devices.  See this related post that describes this in more detail.

    https://e2e.ti.com/support/data-converters/f/73/p/528991/1924460

    Regards,
    Keith