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ADS1293EVM: Signal conditioning and pre-amplification circuit design

Ganesh Raam
Prodigy 95 points
Part Number: ADS1293EVM
Other Parts Discussed in Thread: ADS1293

Hello. I have been using the ADS1293EVM as a platform to acquire EMG signals. I am currently testing the EVM with a signal generator and find that the lowest voltage that can be resolved by the ADS1293 is around 1 mV (with my current experimental setup). I would like for the input to the ADS1293EVM to be around 20 mV pk-pk and would like to design a preamplification circuit for that. After testing with the signal generator, I would like to use this circuit to acquire EMG signals from the body and would like to use the RLD configuration to reducing common-mode noise.

If I were to use a differential amplifier or an instrumentation amplifier for the preamplification part, can I still use the RLD amplifier on the ADS1293 for reducing common-mode noise? Or would I have to design my own RLD circuit?

I have attached an image of a high-level block diagram of both potential circuits in this post.

Thanks and regards,

Ganesh Raam

  • 0
    TI__Guru 66256 points

    Hello Ganesh,

    Thank you for your post.

    If you do decide to add a pre-amplification stage, the RLD circuit with CM detection can be used as drawn in Figure b. That is, the common-mode noise on each channel input will include any noise from the pre-amp stage, as well as the internal INA in the ADS1293. The CM buffer is output on the CMOUT pin, which you can then route back into the RLD amplifier in an inverting amplifier topology.

    Best regards,

  • 0 in reply to Ryan Andrews
    Prodigy 95 points

    Hi Ryan,

    Thanks for replying to my post. I have a few follow-up questions:

    1. I would like to use the same power supply for my preamplifier and the analog components of the ADS1293. Since I would like to visualize my signals using the ADS1293 software, would it be possible to use a battery for analog power supply (VDD) and the USB connection as the digital power supply (VDDIO)? Based on the schematics in pages 10-12 of the ADS1293EVM User Guide, this does not seem possible since JP3 shorts the VDDIO_3P3V and the BATT_LDO_OUT terminals.

    2. Since the analog (AGND) and digital grounds (DGND) are shorted via a 0-ohm resistor, this would mean that the signal conditioning circuit would be affected by fluctuations in the DGND/USB ground. Is there a way to isolate the AGND and DGND terminals on the ADS1293EVM board? Or is it only possible by creating a separate design with isolated AGND and DGND terminals?

    3. If I include a preamplification circuit, I would either have to use the ADS1293 INA in a single-ended configuration with the INA+ terminal connected to the output of the preamplification circuit. In the single-ended mode, I am not sure if the INA- terminal has to be connected to GND or to the VREF test terminal via the test pin. I could also use a pseudo-differential configuration where the signals from the 2 electrodes are amplified separately and these amplified signals are fed as inputs to the INA of the ADS1293EVM board.

    4. With respect to minimizing common-mode noise, would it be better to use the single-ended configuration or the pseudo-differential configuration?

    Best regards,

    Ganesh

  • 0 in reply to Ganesh Raam
    Prodigy 95 points

    Hi ,

    Would it be possible to help out with this?

    Thanks and regards,

    Ganesh

  • 0 in reply to Ganesh Raam
    TI__Guru 66256 points

    Hi Ganesh,

    Please excuse the delay in my response.

    1. You are correct, but you could make it work with some modifications. If you uninstalled the inductor, L2, you could jump a wire from JP3[2] to the top of C12/13/14. 
    2. VSS and VSSIO (analog and digital ground) must eventually tie back together. The intention is for these two voltages to be exactly the same. To reduce noise coupling, it's often helpful to connect them at a single point as close as possible to the chip itself. In layout, much care is taken to place analog and digital components separately and to keep their traces isolated as well. If placement is done right, it's preferred to use a solid ground plane to provide the most direct path for return currents back to the supply source.
    3. I'm not sure I follow the options here. Perhaps the answer to 4. helps.
    4. Pseudo-differential would allow for the same common-mode voltage to be applied to both inputs and improve CMRR.

    Regards,