AMC1210: Connection to EMIF of TMS320F2838x

Hi,

1. Can I connect the AMC12010 to the EMIF interface?

I am not aware of all the interface AMC12010 supports. As long as it supports generic ASYNC interface, it can be connected to EMIF.

2. Can I connect it in parallel to the SDRAM and select the AMC1210 via e.g. CS2?

Yes, CS2 (ASYNC interface) can be used in parallel to CS0 (SDRAM interface).

3. Is there any connection example for the parallel interface? At first glance I was not able to match the AMC1210 pins to the EMIF interface.

Yes, we have EMIF examples in C2000Ware and also you can refer this app note.

Regards,

Vivek Singh

Hello Vivek,

first, thank you for your answer. I know the examples in the C2000Ware and the app note. And both sourced could not really help me. I think I have to go more into the details:

The AMC1210 has the following parallel interface:

Here my thoughts on the connection to the EMIF signals:

The software driver for the AMC1210 will address two different addresses (e.g. 0x0010 0000 and 0x0010 0001). This allows to switch between address and data interpretation via the LSB of the address bus. Further by writing to this address space, the nCS signal is automatically set by the EMIF controller.

This is my actual state of knowledge. Do you see any problems?

Hi,

Look like it is expecting address and data on same bus which is not the case with EMIF. EMIF has different data and address lines hence no ALE signal. It may not work without some glue logic which can mux address and data from EMIF. Is there any other interface like SPI which can be used in this case?

Regards,

Vivek Singh

Okay, it took some time to check all the timing requirements. The SPI is no alternative, as it is much too slow. I think I can use the parallel interface with some modifications.

Like I wrote previously, I will do the following connections:

I checked the timing for the EMIF1 and the AMC1210 and the timing requirements can be met. The nALE signal will be generated by the EMIF1 controller by writing to two different addresses:

• Address number 1 is an even address, so EMIF1A[0] is low
• Address number 2 is an odd address, so EMIF1A[0] is high.

When the address should be written to the AMC1210, adress number 2 is used. When the data should be written or read the address number 1 is used.

The only question is, if it is a problem for the AMC1210 when the nALE signal is in tristate between two accesses? I think the EMIF1 controller will put the address bus back to tristate after a memory access is finished?