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AMC1306M05: ENOB performance

Antenna_Head
Genius 12660 points
Part Number: AMC1306M05

Team-

(on behalf of a customer)

The AMC1306 data sheet Figure 55 indicates that ENOB=14b using Sinc3 filter and OSR=200.

From SBAA094, Table 1, it appears that ENOB=13.9 is THEORETICALLY/IDEALLY possible using OSR=64, though the sinc filter isn't specified there (...ideal).

Q) Is this due to order of the Sinc filter only or are there other limitations of the AMC1306 that require much more oversampling to get ENOB ~=14b?


Q) Is it possible to reach ENOB=14b using AMC1306 if input bandwidth is fixed to 1.25 MHz and OSR = 16?  How?  Is this a matter only of sinc filter order only?

Sinc filter would be implemented most likely in an FPGA.

Thanks!

  • 0
    TI__Mastermind 31655 points

    Hello,

    The table from SBAA094 represents the noise within a fixed bandwidth, so this is assuming that the filter is an ideal brickwall lowpass which will increase the SNR and therefore the ENOB. The order of the sinc filter does make a difference, but the physical device will also have additional noise sources to contend with that are not accounted for in the model from SBAA094. For example, in the electrical characteristics plot of the AMC1306 datasheet you can see that temperature and clocking frequency also affect the SNR/SINAD of the modulator. In fact, the SNR actually goes down as you reach higher clocking frequencies which reduces the increase in SNR that you would see from a higher OSR.

    Increasing the sinc filter order will increase the SNR and consequently the ENOB up to a certain point, but achieving 14 effective bits does not seem doable with an OSR of only 16. One other thing to note is that the settling time for the filter output is also affected by the sinc filter order and the OSR. A higher filter order and OSR will increase the settling time. It seems like the bandwidth for the signal is quite high, so if the customer is trying to catch quick transitions, they may need to use a lower sinc filter order which can settle more quickly.

    What are the customer's bandwidth requirements and expectation for the ENOB?

    Regards,

  • 0 in reply to Scott Cummins
    TI__Genius 12660 points

    Do you have an suggestion for a device that can meet the following:

    ---

    we want an isolated modulator having an output bit stream which can be convert to at least 14bit resolution data in FPGA through digital low pass filter and also maintain a bandwidth around 100kHz.  

    ----

    Thanks, Best, Steve

  • 0 in reply to Antenna_Head
    TI__Genius 12660 points

    Scott-

    The decimating filter may be implemented on a DSP or FPGA, so we aren't necessarily limited to Sinc filters.

    With an input BW of 100 kHz and a max clock frequency of ~20 MHz, it looks like the we are limited to about ENOB = 13b; we are only 1b shy of their requirement, 14b.

    I'm thinking perhaps a more sophisticated filter might get us that extra 1b, plus a flatter passband response for this otherwise wideband application.

    What do you think?

    -Steve

  • 0 in reply to Antenna_Head
    TI__Mastermind 31655 points

    Hi Steve,

    Sorry for the delay here. I'm discussing internally to see what the actual capabilities are and how much depends on the filter topology. I'll get back to you with an update by Tuesday June 2nd.

    Regards,