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ADS1278: ADS1278

Part Number: ADS1278

We are using ADS1278 in our design with SPI interface.

Please clarify me the following.

1. DRDY will act as SPI_CS. Once Data is ready, DRDY will go active low.

2. How the ADS1278 SCLK pin spi mode, will it be a output or input. In datasheet it is mentioned that it is input.

3. In our coding, we need to wait for DRDY to go low (will be using this as interrupt and no Chip select is needed), then we need to output SCLK from controller.

4. Start reading the data.

Please share sample code so that we can port the same in our design.

thanks & regards,

Kotteeswaran.E

  • Hello Kotteeswaran,

    Welcome to the TI E2E Community!

    1.  DRDY is an output from the ADS1278 that tells the host MCU when data is ready to be retrieved.  It is not a chip select; the DOUT lines on the ADS1278 are always drive high or low.

    2.  SCLK is an input to the ADS1278, from the host MCU.  The maximum SCLK frequency is 27MHz in SPI mode.

    3.  Yes, you are correct.  As soon as DRDY transitions from high to low, you can then send SCLK's to clock the conversion results out of the ADC.

    4.  Correct.  The MSB on DOUT is launched on the falling edge of DRDY, and the remaining data bits are launched on the falling edge of SCLK.  Your host MCU can capture data on the rising edge of SCLK.

    We do not have any example code for ADS1278.

    Regards,
    Keith Nicholas
    Precision ADC Applications