I have a question about delta-sigma ADC delay time.
I'm using ADS131A04 device. And my setting are,
f_clkin = 16.384MHz
f_mod = 4.096MHz
f_data = 8kHz
OSR=512
Mode: Multiple Device Configuration Using Asynchronous Interrupt Mode
According slyy095a.pdf(Accounting for delayfrom multiple sourcesin delta-sigma ADCs),
on my settings, delay time will be 312usec.
I'm doing ADC every 8kHz and receiving data with MCU.
So, 312usec delay mean that ADC data receiving in MUC is ADC value of 312usec ago?
Kenji-san,
The relation between the ADC measurement and when it appears at the DOUT is a bit more complicated.
First, the ADS131A04 uses a sinc3 digital filter. This is basically a moving average of the of the ADC measurement for three complete data periods. This will add on some latency to the ADC measurement in comparision to when the data is output on DOUT.
On top of the sinc3 digital filter, there is an additional delay of 1 data period as the data is collected and then moved to the DOUT buffer so that it can be read out from the SPI. I drew a diagram of the settling of the ADC data which will be used in the next revision of the ADS131A04 datasheet. It shows the data settling after a startup of the ADC conversions, but it is applicable for showing that 3 conversions are averaged to settle, and it takes an extra data period to collect the data. Hopefully it clears up your questions about the ADS131A04 data collection.
Joseph Wu
Wu-san
I understand that the sinc3 digital filter behaves like a moving average.
Ihave a question about how calculate moving average(sinc3 digital filter).
The two possible timings are illustrated below.
#1 Blue line: Outputs the average value when 3 data are collected. The final ADC value is output in the 3rd date period of T_settle.
#2 Red line: This is a ring buffer type moving average. If one data is input, one average value is output. On every data period output ADC value.
Which of the two does sinc3 do?
Kenji-san,
The ADC behaves like #2 in red. This is what you describe as the ring buffer. Note that there is an additional delay from the time that the ADC collects the data, to when the data appears at DOUT (which is indicated by /DRDY).
Joseph Wu
